3881 want device driver for HP SmartArray RAID controllers
[illumos-gate.git] / usr / src / uts / common / io / igb / igb_mac.h
blob7df097814c6a4a541b626f25e9461480ad9f6644
1 /*
2 * CDDL HEADER START
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
19 * CDDL HEADER END
23 * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
27 * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
30 /* IntelVersion: 1.32 v3_3_14_3_BHSW1 */
32 #ifndef _IGB_MAC_H
33 #define _IGB_MAC_H
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
40 * Functions that should not be called directly from drivers but can be used
41 * by other files in this 'shared code'
43 void e1000_init_mac_ops_generic(struct e1000_hw *hw);
44 void e1000_null_mac_generic(struct e1000_hw *hw);
45 s32 e1000_null_ops_generic(struct e1000_hw *hw);
46 s32 e1000_null_link_info(struct e1000_hw *hw, u16 *s, u16 *d);
47 bool e1000_null_mng_mode(struct e1000_hw *hw);
48 void e1000_null_update_mc(struct e1000_hw *hw, u8 *h, u32 a);
49 void e1000_null_write_vfta(struct e1000_hw *hw, u32 a, u32 b);
50 void e1000_null_mta_set(struct e1000_hw *hw, u32 a);
51 void e1000_null_rar_set(struct e1000_hw *hw, u8 *h, u32 a);
52 s32 e1000_blink_led_generic(struct e1000_hw *hw);
53 s32 e1000_check_for_copper_link_generic(struct e1000_hw *hw);
54 s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw);
55 s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw);
56 s32 e1000_cleanup_led_generic(struct e1000_hw *hw);
57 s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw);
58 s32 e1000_disable_pcie_master_generic(struct e1000_hw *hw);
59 s32 e1000_force_mac_fc_generic(struct e1000_hw *hw);
60 s32 e1000_get_auto_rd_done_generic(struct e1000_hw *hw);
61 s32 e1000_get_bus_info_pcie_generic(struct e1000_hw *hw);
62 void e1000_set_lan_id_single_port(struct e1000_hw *hw);
63 s32 e1000_get_hw_semaphore_generic(struct e1000_hw *hw);
64 s32 e1000_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed,
65 u16 *duplex);
66 s32 e1000_get_speed_and_duplex_fiber_serdes_generic(struct e1000_hw *hw,
67 u16 *speed, u16 *duplex);
68 s32 e1000_id_led_init_generic(struct e1000_hw *hw);
69 s32 e1000_led_on_generic(struct e1000_hw *hw);
70 s32 e1000_led_off_generic(struct e1000_hw *hw);
71 void e1000_update_mc_addr_list_generic(struct e1000_hw *hw,
72 u8 *mc_addr_list, u32 mc_addr_count);
73 s32 e1000_set_fc_watermarks_generic(struct e1000_hw *hw);
74 s32 e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw);
75 s32 e1000_setup_led_generic(struct e1000_hw *hw);
76 s32 e1000_setup_link_generic(struct e1000_hw *hw);
77 s32 e1000_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg,
78 u32 offset, u8 data);
80 u32 e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr);
82 void e1000_clear_hw_cntrs_base_generic(struct e1000_hw *hw);
83 void e1000_clear_vfta_generic(struct e1000_hw *hw);
84 void e1000_config_collision_dist_generic(struct e1000_hw *hw);
85 void e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count);
86 void e1000_mta_set_generic(struct e1000_hw *hw, u32 hash_value);
87 void e1000_pcix_mmrbc_workaround_generic(struct e1000_hw *hw);
88 void e1000_put_hw_semaphore_generic(struct e1000_hw *hw);
89 void e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);
90 s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw);
91 void e1000_reset_adaptive_generic(struct e1000_hw *hw);
92 void e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop);
93 void e1000_update_adaptive_generic(struct e1000_hw *hw);
94 void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
96 #ifdef __cplusplus
98 #endif
100 #endif /* _IGB_MAC_H */