2 * This file is provided under a CDDLv1 license. When using or
3 * redistributing this file, you may do so under this license.
4 * In redistributing this file this license must be included
5 * and no other modification of this header file is permitted.
9 * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
11 * The contents of this file are subject to the terms of Version
12 * 1.0 of the Common Development and Distribution License (the "License").
14 * You should have received a copy of the License with this software.
15 * You can obtain a copy of the License at
16 * http://www.opensolaris.org/os/licensing.
17 * See the License for the specific language governing permissions
18 * and limitations under the License.
22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
23 * Use is subject to license terms of the CDDLv1.
27 * IntelVersion: 1.27 v3-1-10-1_2009-9-18_Release14-6
30 #include "e1000_api.h"
32 static u8
e1000_calculate_checksum(u8
*buffer
, u32 length
);
35 * e1000_calculate_checksum - Calculate checksum for buffer
36 * @buffer: pointer to EEPROM
37 * @length: size of EEPROM to calculate a checksum for
39 * Calculates the checksum for some buffer on a specified length. The
40 * checksum calculated is returned.
43 e1000_calculate_checksum(u8
*buffer
, u32 length
)
48 DEBUGFUNC("e1000_calculate_checksum");
53 for (i
= 0; i
< length
; i
++)
60 * e1000_mng_enable_host_if_generic - Checks host interface is enabled
61 * @hw: pointer to the HW structure
63 * Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
65 * This function checks whether the HOST IF is enabled for command operation
66 * and also checks whether the previous command is completed. It busy waits
67 * in case of previous command is not completed.
70 e1000_mng_enable_host_if_generic(struct e1000_hw
*hw
)
73 s32 ret_val
= E1000_SUCCESS
;
76 DEBUGFUNC("e1000_mng_enable_host_if_generic");
78 /* Check that the host interface is enabled. */
79 hicr
= E1000_READ_REG(hw
, E1000_HICR
);
80 if ((hicr
& E1000_HICR_EN
) == 0) {
81 DEBUGOUT("E1000_HOST_EN bit disabled.\n");
82 ret_val
= -E1000_ERR_HOST_INTERFACE_COMMAND
;
85 /* check the previous command is completed */
86 for (i
= 0; i
< E1000_MNG_DHCP_COMMAND_TIMEOUT
; i
++) {
87 hicr
= E1000_READ_REG(hw
, E1000_HICR
);
88 if (!(hicr
& E1000_HICR_C
))
93 if (i
== E1000_MNG_DHCP_COMMAND_TIMEOUT
) {
94 DEBUGOUT("Previous command timeout failed .\n");
95 ret_val
= -E1000_ERR_HOST_INTERFACE_COMMAND
;
103 * e1000_check_mng_mode_generic - Generic check management mode
104 * @hw: pointer to the HW structure
106 * Reads the firmware semaphore register and returns true (>0) if
107 * manageability is enabled, else false (0).
110 e1000_check_mng_mode_generic(struct e1000_hw
*hw
)
114 DEBUGFUNC("e1000_check_mng_mode_generic");
116 fwsm
= E1000_READ_REG(hw
, E1000_FWSM
);
118 return ((fwsm
& E1000_FWSM_MODE_MASK
) ==
119 (E1000_MNG_IAMT_MODE
<< E1000_FWSM_MODE_SHIFT
));
123 * e1000_enable_tx_pkt_filtering_generic - Enable packet filtering on TX
124 * @hw: pointer to the HW structure
126 * Enables packet filtering on transmit packets if manageability is enabled
127 * and host interface is enabled.
130 e1000_enable_tx_pkt_filtering_generic(struct e1000_hw
*hw
)
132 struct e1000_host_mng_dhcp_cookie
*hdr
= &hw
->mng_cookie
;
133 u32
*buffer
= (u32
*)&hw
->mng_cookie
;
135 s32 ret_val
, hdr_csum
, csum
;
137 bool tx_filter
= true;
139 DEBUGFUNC("e1000_enable_tx_pkt_filtering_generic");
141 /* No manageability, no filtering */
142 if (!hw
->mac
.ops
.check_mng_mode(hw
)) {
148 * If we can't read from the host interface for whatever reason,
151 ret_val
= hw
->mac
.ops
.mng_enable_host_if(hw
);
152 if (ret_val
!= E1000_SUCCESS
) {
157 /* Read in the header. Length and offset are in dwords. */
158 len
= E1000_MNG_DHCP_COOKIE_LENGTH
>> 2;
159 offset
= E1000_MNG_DHCP_COOKIE_OFFSET
>> 2;
160 for (i
= 0; i
< len
; i
++) {
161 *(buffer
+ i
) = E1000_READ_REG_ARRAY_DWORD(hw
,
165 hdr_csum
= hdr
->checksum
;
167 csum
= e1000_calculate_checksum((u8
*)hdr
,
168 E1000_MNG_DHCP_COOKIE_LENGTH
);
170 * If either the checksums or signature don't match, then the cookie
171 * area isn't considered valid, in which case we take the safe route
172 * of assuming Tx filtering is enabled.
174 if (hdr_csum
!= csum
)
176 if (hdr
->signature
!= E1000_IAMT_SIGNATURE
)
179 /* Cookie area is valid, make the final check for filtering. */
180 if (!(hdr
->status
& E1000_MNG_DHCP_COOKIE_STATUS_PARSING
))
184 hw
->mac
.tx_pkt_filtering
= tx_filter
;
189 * e1000_mng_write_dhcp_info_generic - Writes DHCP info to host interface
190 * @hw: pointer to the HW structure
191 * @buffer: pointer to the host interface
192 * @length: size of the buffer
194 * Writes the DHCP information to the host interface.
197 e1000_mng_write_dhcp_info_generic(struct e1000_hw
*hw
, u8
*buffer
,
200 struct e1000_host_mng_command_header hdr
;
204 DEBUGFUNC("e1000_mng_write_dhcp_info_generic");
206 hdr
.command_id
= E1000_MNG_DHCP_TX_PAYLOAD_CMD
;
207 hdr
.command_length
= length
;
212 /* Enable the host interface */
213 ret_val
= hw
->mac
.ops
.mng_enable_host_if(hw
);
217 /* Populate the host interface with the contents of "buffer". */
218 ret_val
= hw
->mac
.ops
.mng_host_if_write(hw
, buffer
, length
,
219 sizeof (hdr
), &(hdr
.checksum
));
223 /* Write the manageability command header */
224 ret_val
= hw
->mac
.ops
.mng_write_cmd_header(hw
, &hdr
);
228 /* Tell the ARC a new command is pending. */
229 hicr
= E1000_READ_REG(hw
, E1000_HICR
);
230 E1000_WRITE_REG(hw
, E1000_HICR
, hicr
| E1000_HICR_C
);
237 * e1000_mng_write_cmd_header_generic - Writes manageability command header
238 * @hw: pointer to the HW structure
239 * @hdr: pointer to the host interface command header
241 * Writes the command header after does the checksum calculation.
244 e1000_mng_write_cmd_header_generic(struct e1000_hw
*hw
,
245 struct e1000_host_mng_command_header
*hdr
)
247 u16 i
, length
= sizeof (struct e1000_host_mng_command_header
);
249 DEBUGFUNC("e1000_mng_write_cmd_header_generic");
251 /* Write the whole command header structure with new checksum. */
253 hdr
->checksum
= e1000_calculate_checksum((u8
*)hdr
, length
);
256 /* Write the relevant command block into the ram area. */
257 for (i
= 0; i
< length
; i
++) {
258 E1000_WRITE_REG_ARRAY_DWORD(hw
, E1000_HOST_IF
, i
,
259 *((u32
*)(uintptr_t)hdr
+ i
));
260 E1000_WRITE_FLUSH(hw
);
263 return (E1000_SUCCESS
);
267 * e1000_mng_host_if_write_generic - Write to the manageability host interface
268 * @hw: pointer to the HW structure
269 * @buffer: pointer to the host interface buffer
270 * @length: size of the buffer
271 * @offset: location in the buffer to write to
272 * @sum: sum of the data (not checksum)
274 * This function writes the buffer content at the offset given on the host if.
275 * It also does alignment considerations to do the writes in most efficient
276 * way. Also fills up the sum of the buffer in *buffer parameter.
279 e1000_mng_host_if_write_generic(struct e1000_hw
*hw
, u8
*buffer
,
280 u16 length
, u16 offset
, u8
*sum
)
285 s32 ret_val
= E1000_SUCCESS
;
286 u16 remaining
, i
, j
, prev_bytes
;
288 DEBUGFUNC("e1000_mng_host_if_write_generic");
290 /* sum = only sum of the data and it is not checksum */
292 if (length
== 0 || offset
+ length
> E1000_HI_MAX_MNG_DATA_LENGTH
) {
293 ret_val
= -E1000_ERR_PARAM
;
298 prev_bytes
= offset
& 0x3;
302 data
= E1000_READ_REG_ARRAY_DWORD(hw
, E1000_HOST_IF
, offset
);
303 for (j
= prev_bytes
; j
< sizeof (u32
); j
++) {
304 *(tmp
+ j
) = *bufptr
++;
307 E1000_WRITE_REG_ARRAY_DWORD(hw
, E1000_HOST_IF
, offset
, data
);
308 length
-= j
- prev_bytes
;
312 remaining
= length
& 0x3;
315 /* Calculate length in DWORDs */
319 * The device driver writes the relevant command block into the ram
322 for (i
= 0; i
< length
; i
++) {
323 for (j
= 0; j
< sizeof (u32
); j
++) {
324 *(tmp
+ j
) = *bufptr
++;
328 E1000_WRITE_REG_ARRAY_DWORD(hw
, E1000_HOST_IF
,
332 for (j
= 0; j
< sizeof (u32
); j
++) {
334 *(tmp
+ j
) = *bufptr
++;
340 E1000_WRITE_REG_ARRAY_DWORD(hw
, E1000_HOST_IF
,
348 * e1000_enable_mng_pass_thru - Enable processing of ARP's
349 * @hw: pointer to the HW structure
351 * Verifies the hardware needs to allow ARPs to be processed by the host.
354 e1000_enable_mng_pass_thru(struct e1000_hw
*hw
)
358 bool ret_val
= false;
360 DEBUGFUNC("e1000_enable_mng_pass_thru");
362 if (!hw
->mac
.asf_firmware_present
)
365 manc
= E1000_READ_REG(hw
, E1000_MANC
);
367 if (!(manc
& E1000_MANC_RCV_TCO_EN
) ||
368 !(manc
& E1000_MANC_EN_MAC_ADDR_FILTER
))
371 if (hw
->mac
.arc_subsystem_valid
) {
372 fwsm
= E1000_READ_REG(hw
, E1000_FWSM
);
373 factps
= E1000_READ_REG(hw
, E1000_FACTPS
);
375 if (!(factps
& E1000_FACTPS_MNGCG
) &&
376 ((fwsm
& E1000_FWSM_MODE_MASK
) ==
377 (e1000_mng_mode_pt
<< E1000_FWSM_MODE_SHIFT
))) {
382 if ((manc
& E1000_MANC_SMBUS_EN
) &&
383 !(manc
& E1000_MANC_ASF_EN
)) {