usr/src/cmd/bhyve/pci_hostbridge.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (c) 2011 NetApp, Inc.
   5  * Copyright (c) 2018 Joyent, Inc.
   6  * Copyright 2021 Oxide Computer Company
   7  * All rights reserved.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
  19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
  22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  * $FreeBSD$
  31  */
  32
  33 #include <sys/cdefs.h>
  34 #ifndef __FreeBSD__
  35 #include <errno.h>
  36 #include <stdlib.h>
  37 #include <stdio.h>
  38 #include <strings.h>
  39 #endif
  40 __FBSDID("$FreeBSD$");
  41
  42 #include <stdlib.h>
  43
  44 #include "config.h"
  45 #include "pci_emul.h"
  46 #ifndef __FreeBSD__
  47 #include "bhyverun.h"
  48 #endif
  49
  50 #ifndef __FreeBSD__
  51 static struct pci_hostbridge_model {
  52         const char      *phm_model;
  53         uint16_t        phm_vendor;
  54         uint16_t        phm_device;
  55 } pci_hb_models[] = {
  56         { "amd",        0x1022, 0x7432 }, /* AMD/made-up */
  57         { "netapp",     0x1275, 0x1275 }, /* NetApp/NetApp */
  58         { "i440fx",     0x8086, 0x1237 }, /* Intel/82441 */
  59         { "q35",        0x8086, 0x29b0 }, /* Intel/Q35 HB */
  60 };
  61
  62 #define NUM_HB_MODELS   (sizeof (pci_hb_models) / sizeof (pci_hb_models[0]))
  63 #endif
  64
  65 static int
  66 pci_hostbridge_init(struct vmctx *ctx __unused, struct pci_devinst *pi,
  67     nvlist_t *nvl)
  68 {
  69         const char *value;
  70         u_int vendor, device;
  71
  72 #ifdef __FreeBSD__
  73         vendor = 0x1275;        /* NetApp */
  74         device = 0x1275;        /* NetApp */
  75 #else
  76         vendor = device = 0;
  77 #endif
  78
  79         value = get_config_value_node(nvl, "vendor");
  80         if (value != NULL)
  81                 vendor = strtol(value, NULL, 0);
  82         value = get_config_value_node(nvl, "devid");
  83         if (value != NULL)
  84                 device = strtol(value, NULL, 0);
  85
  86 #ifndef __FreeBSD__
  87         const char *model = get_config_value_node(nvl, "model");
  88
  89         if (model != NULL && (vendor != 0 || device != 0)) {
  90                 fprintf(stderr, "pci_hostbridge: cannot specify model "
  91                     "and vendor/device");
  92                 return (-1);
  93         } else if ((vendor != 0 && device == 0) ||
  94             (vendor == 0 && device != 0)) {
  95                 fprintf(stderr, "pci_hostbridge: must specify both vendor and"
  96                     "device for custom hostbridge");
  97                 return (-1);
  98         }
  99         if (model == NULL && vendor == 0 && device == 0)
 100                 model = "netapp";
 101
 102         if (model != NULL) {
 103                 for (uint_t i = 0; i < NUM_HB_MODELS; i++) {
 104                         if (strcmp(model, pci_hb_models[i].phm_model) != 0)
 105                                 continue;
 106
 107                         /* found a model match */
 108                         vendor = pci_hb_models[i].phm_vendor;
 109                         device = pci_hb_models[i].phm_device;
 110                         break;
 111                 }
 112                 if (vendor == 0) {
 113                         fprintf(stderr, "pci_hostbridge: invalid model '%s'",
 114                             model);
 115                         return (-1);
 116                 }
 117         }
 118
 119         /* Both i440fx and Q35 chipsets feature the concept of Programmable
 120          * Address Memory (PAM), where certain physical address ranges can be
 121          * configured to direct reads/writes to either DRAM, or to the PCI MMIO
 122          * space instead.  At boot, they default to bypassing DRAM, so in order
 123          * to cheaply paper over our lack of emulation, the memory in PAM0
 124          * (0xf0000-0xfffff, the System BIOS segment) should be zeroed.
 125          *
 126          * If this emulation is expanded in the future to truly support PAM
 127          * behavior, this hack can be removed.
 128          */
 129         if (vendor == 0x8086 && (device == 0x1237 || device == 0x29b0)) {
 130                 const uintptr_t start = 0xf0000;
 131                 const size_t len = 0x10000;
 132                 void *system_bios_region = paddr_guest2host(ctx, start, len);
 133                 assert(system_bios_region != NULL);
 134                 bzero(system_bios_region, len);
 135         }
 136 #endif /* !__FreeBSD__ */
 137
 138         /* config space */
 139         pci_set_cfgdata16(pi, PCIR_VENDOR, vendor);
 140         pci_set_cfgdata16(pi, PCIR_DEVICE, device);
 141         pci_set_cfgdata8(pi, PCIR_HDRTYPE, PCIM_HDRTYPE_NORMAL);
 142         pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_BRIDGE);
 143         pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_BRIDGE_HOST);
 144
 145         pci_emul_add_pciecap(pi, PCIEM_TYPE_ROOT_PORT);
 146
 147         return (0);
 148 }
 149
 150 static int
 151 pci_amd_hostbridge_legacy_config(nvlist_t *nvl, const char *opts __unused)
 152 {
 153         set_config_value_node(nvl, "vendor", "0x1022"); /* AMD */
 154         set_config_value_node(nvl, "devid", "0x7432");  /* made up */
 155
 156         return (0);
 157 }
 158
 159 static const struct pci_devemu pci_de_amd_hostbridge = {
 160         .pe_emu = "amd_hostbridge",
 161         .pe_legacy_config = pci_amd_hostbridge_legacy_config,
 162         .pe_alias = "hostbridge",
 163 };
 164 PCI_EMUL_SET(pci_de_amd_hostbridge);
 165
 166 static const struct pci_devemu pci_de_hostbridge = {
 167         .pe_emu = "hostbridge",
 168         .pe_init = pci_hostbridge_init,
 169 };
 170 PCI_EMUL_SET(pci_de_hostbridge);