usr/src/uts/common/sys/fibre-channel/fca/oce/oce_io.h

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21
  22 /* Copyright © 2003-2011 Emulex. All rights reserved.  */
  23
  24 /*
  25  * Header file defining the HW IO elements
  26  */
  27
  28 #ifndef _OCE_IO_H_
  29 #define _OCE_IO_H_
  30
  31 #ifdef __cplusplus
  32 extern "C" {
  33 #endif
  34
  35 #include <sys/types.h>
  36 #include <sys/dditypes.h>
  37 #include <sys/mutex.h>
  38 #include <sys/stream.h>
  39 #include <sys/debug.h>
  40 #include <sys/byteorder.h>
  41 #include <oce_hw.h>
  42 #include <oce_buf.h>
  43
  44 #define DEFAULT_MQ_MBOX_TIMEOUT (5 * 1000 * 1000) /* 5 sec (in usec) */
  45 #define MBX_READY_TIMEOUT       (1 * 1000 * 1000) /* 1 sec (in usec) */
  46 #define DEFAULT_DRAIN_TIME      200     /* Default Drain Time */
  47 #define MBX_TIMEOUT_SEC         5
  48 #define STAT_TIMEOUT            2000000 /* update stats every 2 sec */
  49
  50 struct oce_dev;
  51
  52 enum eq_len {
  53         EQ_LEN_256 = 256,
  54         EQ_LEN_512 = 512,
  55         EQ_LEN_1024 = 1024,
  56         EQ_LEN_2048 = 2048,
  57         EQ_LEN_4096 = 4096
  58 };
  59
  60 enum eqe_size {
  61         EQE_SIZE_4 = 4,
  62         EQE_SIZE_16 = 16
  63 };
  64
  65 enum qtype {
  66         QTYPE_EQ,
  67         QTYPE_MQ,
  68         QTYPE_WQ,
  69         QTYPE_RQ,
  70         QTYPE_CQ,
  71         QTYPE_RSS
  72 };
  73
  74 typedef enum qstate_e {
  75         QDELETED = 0x0,
  76         QCREATED = 0x1
  77 }qstate_t;
  78
  79 struct eq_config {
  80         /* number of entries in the eq */
  81         enum eq_len q_len;
  82         /* size of each entry */
  83         enum eqe_size   item_size;
  84         /* vector associated with this eq */
  85         uint32_t    q_vector_num;
  86         /* minimum possible eq delay i usec */
  87         uint8_t         min_eqd;
  88         /* max eq delay in usec */
  89         uint8_t         max_eqd;
  90         /* currently configured eq delay in usec */
  91         uint8_t         cur_eqd;
  92         /* pad */
  93         uint8_t pad;
  94 };
  95
  96 struct oce_eq {
  97         /* Lock for this queue */
  98         kmutex_t lock;
  99         /* id assigned by the hw to this eq */
 100         uint32_t eq_id;
 101         /* handle to the creating parent dev */
 102         void *parent;
 103         /* callback context */
 104         void *cb_context;
 105         /* ring buffer for this eq */
 106         oce_ring_buffer_t *ring;
 107         /* reference count of this structure */
 108         uint32_t ref_count;
 109         /* Queue state */
 110         qstate_t qstate;
 111         /* configuration of this eq */
 112         struct eq_config eq_cfg;
 113 };
 114
 115 enum cq_len {
 116         CQ_LEN_256 = 256,
 117         CQ_LEN_512 = 512,
 118         CQ_LEN_1024 = 1024
 119 };
 120
 121 struct cq_config {
 122         /* length of queue */
 123         enum cq_len q_len;
 124         /* size of each item */
 125         uint32_t item_size;
 126         /* is eventable */
 127         boolean_t is_eventable;
 128         /* solicited eventable? */
 129         boolean_t sol_eventable;
 130         /* no delay? */
 131         boolean_t nodelay;
 132         /* dma coalescing */
 133         uint16_t dma_coalescing;
 134 };
 135
 136 typedef uint16_t (*cq_handler_t)(void *arg1);
 137
 138 struct oce_cq {
 139         /* lock */
 140         kmutex_t lock;
 141         /* id given by the hardware */
 142         uint32_t    cq_id;
 143         /* parent device to which this cq belongs */
 144         void *parent;
 145         /* event queue associated with this cq */
 146         struct oce_eq *eq;
 147         cq_handler_t cq_handler;
 148         /* placeholder for callback context */
 149         void *cb_arg;
 150         /* ring buffer for this cq */
 151         oce_ring_buffer_t *ring;
 152         /* Queue state */
 153         qstate_t qstate;
 154         /* configuration of this cq */
 155         struct cq_config cq_cfg;
 156         /* reference count of this structure */
 157         uint32_t ref_count;
 158 };
 159
 160 struct mq_config {
 161         uint32_t eqd;
 162         uint8_t q_len;
 163         uint8_t pad[3];
 164
 165 };
 166
 167 struct oce_mq {
 168         /* lock for the mq */
 169         kmutex_t lock;
 170         /* handle to the parent device */
 171         void *parent;
 172         /* send queue */
 173         oce_ring_buffer_t *ring;
 174         /* idnetifier for the mq */
 175         uint32_t mq_id;
 176         struct oce_cq *cq;
 177         struct oce_cq *async_cq;
 178         /* free entries in Queue */
 179         uint32_t mq_free;
 180         /* Queue state */
 181         qstate_t qstate;
 182
 183         /* configuration of this mq */
 184         struct mq_config cfg;
 185 };
 186
 187
 188 /*
 189  * utility structure that handles context of mbx
 190  */
 191 struct oce_mbx_ctx {
 192         /* pointer to mbx */
 193         struct oce_mbx *mbx;
 194         /* call back functioin [optional] */
 195         void (*cb)(void *ctx);
 196         /* call back context [optional] */
 197         void *cb_ctx;
 198 };
 199
 200 struct wq_config {
 201         /* qtype */
 202         uint8_t wq_type;
 203         uint16_t buf_size;
 204         uint8_t pad[1];
 205         uint32_t q_len; /* number of wqes */
 206         uint16_t pd_id; /* protection domain id */
 207         uint16_t pci_fn_num; /* pci function number */
 208         uint32_t eqd;   /* interrupt delay */
 209         uint32_t nbufs; /* copy buffers */
 210         uint32_t nhdl; /* preallocated memory handles */
 211 };
 212
 213 struct oce_wq {
 214         kmutex_t tx_lock; /* lock for the WQ */
 215         kmutex_t txc_lock; /* tx compl lock */
 216         void *parent; /* parent of this wq */
 217         oce_ring_buffer_t *ring; /* ring buffer managing the wqes */
 218         struct oce_cq *cq;      /* cq associated with this wq */
 219         kmem_cache_t *wqed_cache; /* packet desc cache */
 220         oce_wq_bdesc_t *wq_bdesc_array; /* buffer desc array */
 221         OCE_LIST_T wq_buf_list; /* buffer list */
 222         OCE_LIST_T wqe_desc_list; /* packet descriptor list */
 223         OCE_LIST_T wq_mdesc_list; /* free list of memory handles */
 224         oce_wq_mdesc_t *wq_mdesc_array; /* preallocated memory handles */
 225         uint32_t wqm_used; /* memory handles uses */
 226         boolean_t resched; /* used for mac_tx_update */
 227         uint32_t wq_free; /* Wqe free */
 228         uint32_t tx_deferd; /* Wqe free */
 229         uint32_t pkt_drops; /* drops */
 230         /* Queue state */
 231         qstate_t qstate;
 232         uint16_t wq_id; /* wq ID */
 233     struct wq_config cfg; /* q config */
 234 };
 235
 236 struct rq_config {
 237         uint32_t q_len; /* q length */
 238         uint32_t frag_size; /* fragment size. Send log2(size) in commmand */
 239         uint32_t mtu; /* max frame size for this RQ */
 240         uint32_t if_id; /* interface ID to associate this RQ with */
 241         uint32_t is_rss_queue; /* is this RQ an RSS queue? */
 242         uint32_t eqd;  /* interrupt delay */
 243         uint32_t nbufs; /* Total data buffers */
 244 };
 245
 246 struct rq_shadow_entry {
 247         oce_rq_bdesc_t *rqbd;
 248 };
 249
 250 struct oce_rq {
 251         /* RQ config */
 252         struct rq_config cfg;
 253         /* RQ id */
 254         uint32_t rq_id;
 255         /* parent of this rq */
 256         void *parent;
 257         /* CPU ID assigend to this RQ if it is an RSS queue */
 258         uint32_t rss_cpuid;
 259         /* ring buffer managing the RQEs */
 260         oce_ring_buffer_t *ring;
 261         /* cq associated with this queue */
 262         struct oce_cq *cq;
 263         oce_rq_bdesc_t  *rq_bdesc_array;
 264         /* shadow list of mblk for rq ring */
 265         oce_rq_bdesc_t **shadow_ring;
 266         oce_rq_bdesc_t  **rqb_freelist;
 267         uint32_t rqb_free;
 268         uint32_t rqb_next_free; /* next free slot */
 269         uint32_t rqb_rc_head; /* recycling  head */
 270         uint32_t buf_avail; /* buffer avaialable with hw */
 271         uint32_t pending; /* Buffers sent up */
 272         /* Queue state */
 273         qstate_t qstate;
 274         /* rq lock */
 275         kmutex_t rx_lock;
 276         kmutex_t rc_lock;
 277 };
 278
 279 struct link_status {
 280         /* dw 0 */
 281         uint8_t physical_port;
 282         uint8_t mac_duplex;
 283         uint8_t mac_speed;
 284         uint8_t mac_fault;
 285         /* dw 1 */
 286         uint8_t mgmt_mac_duplex;
 287         uint8_t mgmt_mac_speed;
 288         uint16_t qos_link_speed;
 289         /* dw2 */
 290         uint32_t logical_link_status;
 291 };
 292
 293 oce_dma_buf_t *oce_alloc_dma_buffer(struct oce_dev *dev,
 294     uint32_t size, ddi_dma_attr_t *dma_attr, uint32_t flags);
 295 void oce_free_dma_buffer(struct oce_dev *dev, oce_dma_buf_t *dbuf);
 296
 297 oce_ring_buffer_t *create_ring_buffer(struct oce_dev *dev,
 298     uint32_t num_items, uint32_t item_size,
 299     uint32_t flags);
 300 void destroy_ring_buffer(struct oce_dev *dev, oce_ring_buffer_t *ring);
 301
 302 /* Queues */
 303 int oce_set_eq_delay(struct oce_dev *dev, uint32_t *eq_arr,
 304     uint32_t eq_cnt, uint32_t eq_delay);
 305 void oce_arm_eq(struct oce_dev *dev, int16_t qid, int npopped,
 306     boolean_t rearm, boolean_t clearint);
 307 void oce_arm_cq(struct oce_dev *dev, int16_t qid, int npopped,
 308     boolean_t rearm);
 309 void oce_drain_eq(struct oce_eq *eq);
 310 void oce_dev_rss_ready(struct oce_dev *dev);
 311
 312 /* Bootstrap */
 313 int oce_mbox_init(struct oce_dev *dev);
 314 int oce_mbox_fini(struct oce_dev *dev);
 315 int oce_mbox_dispatch(struct  oce_dev *dev, uint32_t tmo_sec);
 316 int oce_mbox_wait(struct  oce_dev *dev, uint32_t tmo_sec);
 317 int oce_mbox_post(struct oce_dev *dev, struct oce_mbx *mbx,
 318     struct  oce_mbx_ctx *mbxctx);
 319
 320 /* Hardware */
 321 boolean_t oce_is_reset_pci(struct oce_dev *dev);
 322 int oce_pci_soft_reset(struct oce_dev *dev);
 323 int oce_POST(struct oce_dev *dev);
 324 int oce_pci_init(struct oce_dev *dev);
 325 void oce_pci_fini(struct oce_dev *dev);
 326 int oce_init_txrx(struct oce_dev *dev);
 327 void oce_fini_txrx(struct oce_dev *dev);
 328 int oce_create_queues(struct oce_dev *dev);
 329 void oce_delete_queues(struct oce_dev *dev);
 330 void oce_delete_nw_interface(struct oce_dev *dev);
 331 int oce_create_nw_interface(struct oce_dev *dev);
 332 int oce_reset_fun(struct oce_dev *dev);
 333
 334 /* Transmit */
 335 struct oce_wq *oce_get_wq(struct oce_dev *dev, mblk_t *pkt);
 336 uint16_t  oce_drain_wq_cq(void *arg);
 337 mblk_t *oce_send_packet(struct oce_wq *wq, mblk_t *mp);
 338 int oce_start_wq(struct oce_wq *wq);
 339 void oce_clean_wq(struct oce_wq *wq);
 340
 341
 342 /* Recieve */
 343 uint16_t oce_drain_rq_cq(void *arg);
 344 int oce_start_rq(struct oce_rq *rq);
 345 void oce_clean_rq(struct oce_rq *rq);
 346 void oce_rq_discharge(struct oce_rq *rq);
 347 int oce_rx_pending(struct oce_dev *dev, struct oce_rq *rq, int32_t timeout);
 348
 349 /* event handling */
 350 uint16_t oce_drain_mq_cq(void *arg);
 351 int oce_mq_mbox_post(struct  oce_dev *dev, struct  oce_mbx *mbx,
 352     struct oce_mbx_ctx *mbxctx);
 353 struct oce_mbx *oce_mq_get_mbx(struct oce_dev *dev);
 354 void oce_clean_mq(struct oce_mq *mq);
 355 int oce_start_mq(struct oce_mq *mq);
 356
 357
 358 /* mbx functions */
 359 void mbx_common_req_hdr_init(struct mbx_hdr *hdr, uint8_t dom,
 360     uint8_t port, uint8_t subsys, uint8_t opcode,
 361     uint32_t timeout, uint32_t pyld_len);
 362 void mbx_nic_req_hdr_init(struct mbx_hdr *hdr, uint8_t dom, uint8_t port,
 363     uint8_t opcode, uint32_t timeout, uint32_t pyld_len);
 364 int oce_get_fw_version(struct oce_dev *dev);
 365 int oce_read_mac_addr(struct oce_dev *dev, uint32_t if_id, uint8_t perm,
 366     uint8_t type, struct mac_address_format *mac);
 367 int oce_if_create(struct oce_dev *dev, uint32_t cap_flags, uint32_t en_flags,
 368     uint16_t vlan_tag, uint8_t *mac_addr, uint32_t *if_id);
 369 int oce_if_del(struct oce_dev *dev, uint32_t if_id);
 370 int oce_num_intr_vectors_set(struct oce_dev *dev, uint32_t num_vectors);
 371
 372 int oce_get_link_status(struct oce_dev *dev, struct link_status *link);
 373 int oce_set_rx_filter(struct oce_dev *dev,
 374     struct mbx_set_common_ntwk_rx_filter *filter);
 375 int oce_set_multicast_table(struct oce_dev *dev, uint32_t if_id,
 376         struct ether_addr *mca_table, uint16_t mca_cnt, boolean_t promisc);
 377 int oce_get_fw_config(struct oce_dev *dev);
 378 int oce_get_hw_stats(struct oce_dev *dev);
 379 int oce_set_flow_control(struct oce_dev *dev, uint32_t flow_control);
 380 int oce_get_flow_control(struct oce_dev *dev, uint32_t *flow_control);
 381 int oce_set_promiscuous(struct oce_dev *dev, boolean_t enable);
 382 int oce_add_mac(struct oce_dev *dev, uint32_t if_id,
 383                         const uint8_t *mac, uint32_t *pmac_id);
 384 int oce_del_mac(struct oce_dev *dev, uint32_t if_id, uint32_t *pmac_id);
 385 int oce_config_vlan(struct oce_dev *dev, uint32_t if_id,
 386     struct normal_vlan *vtag_arr,
 387     uint8_t vtag_cnt,  boolean_t untagged,
 388     boolean_t enable_promisc);
 389 int oce_config_link(struct oce_dev *dev, boolean_t enable);
 390 int oce_config_rss(struct oce_dev *dev, uint16_t if_id, char *hkey, char *itbl,
 391     int  tbl_sz, uint16_t rss_type, uint8_t flush);
 392 int oce_issue_mbox(struct oce_dev *dev, queue_t *wq, mblk_t *mp,
 393     uint32_t *payload_length);
 394 #ifdef __cplusplus
 395 }
 396 #endif
 397
 398 #endif /* _OCE_IO_H_ */