usr/src/uts/sun4u/sys/pci/pci_axq.h

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License, Version 1.0 only
   6  * (the "License").  You may not use this file except in compliance
   7  * with the License.
   8  *
   9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
  10  * or http://www.opensolaris.org/os/licensing.
  11  * See the License for the specific language governing permissions
  12  * and limitations under the License.
  13  *
  14  * When distributing Covered Code, include this CDDL HEADER in each
  15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  16  * If applicable, add the following below this CDDL HEADER, with the
  17  * fields enclosed by brackets "[]" replaced with your own identifying
  18  * information: Portions Copyright [yyyy] [name of copyright owner]
  19  *
  20  * CDDL HEADER END
  21  */
  22 /*
  23  * Copyright (c) 2001 by Sun Microsystems, Inc.
  24  * All rights reserved.
  25  */
  26
  27 #ifndef _SYS_PCI_AXQ_H
  28 #define _SYS_PCI_AXQ_H
  29
  30 #include <sys/types.h>
  31 #include <sys/atomic.h>
  32
  33 #ifdef  __cplusplus
  34 extern "C" {
  35 #endif
  36
  37 #define PIO_LIMIT_ENTER(p)      { \
  38                                 int n;\
  39                                 for (;;) {\
  40                                         do {\
  41                                                 n = p->pbm_pio_counter;\
  42                                         } while (n <= 0);\
  43                                         if (atomic_dec_32_nv(\
  44                                             (uint_t *)&p->pbm_pio_counter)\
  45                                             == (n - 1))\
  46                                                 break;\
  47                                         atomic_inc_32(\
  48                                             (uint_t *)&p->pbm_pio_counter);\
  49                                 }\
  50                                 }
  51
  52
  53
  54 #define PIO_LIMIT_EXIT(p)       atomic_inc_32((uint_t *)&p->pbm_pio_counter);
  55
  56 extern void pci_axq_setup(ddi_map_req_t *mp, pbm_t *pbm_p);
  57 extern void pci_axq_pio_limit(pbm_t *pbm_p);
  58
  59 #ifdef  __cplusplus
  60 }
  61 #endif
  62
  63 #endif  /* _SYS_PCI_AXQ_H */