2 +----------------------------------------------------------------------+
4 +----------------------------------------------------------------------+
5 | Copyright (c) 2010-2014 Facebook, Inc. (http://www.facebook.com) |
6 +----------------------------------------------------------------------+
7 | This source file is subject to version 3.01 of the PHP license, |
8 | that is bundled with this package in the file LICENSE, and is |
9 | available through the world-wide-web at the following url: |
10 | http://www.php.net/license/3_01.txt |
11 | If you did not receive a copy of the PHP license and are unable to |
12 | obtain it through the world-wide-web, please send a note to |
13 | license@php.net so we can mail you a copy immediately. |
14 +----------------------------------------------------------------------+
17 #ifndef incl_HPHP_JIT_CODE_GEN_H_
18 #define incl_HPHP_JIT_CODE_GEN_H_
20 #include "hphp/runtime/vm/jit/types.h"
21 #include "hphp/runtime/vm/jit/state-vector.h"
22 #include "hphp/runtime/vm/jit/translator.h"
23 #include "hphp/util/code-cache.h"
25 namespace HPHP
{ namespace JIT
{
29 enum class SyncOptions
{
33 kSmashableAndSyncPoint
,
36 // Returned information from cgCallHelper
37 struct CallHelperInfo
{
41 // Information about where code was generated, for pretty-printing.
43 explicit AsmInfo(const IRUnit
& unit
)
44 : instRanges(unit
, TcaRange(nullptr, nullptr))
45 , asmRanges(unit
, TcaRange(nullptr, nullptr))
46 , acoldRanges(unit
, TcaRange(nullptr, nullptr))
47 , afrozenRanges(unit
, TcaRange(nullptr, nullptr))
50 // Asm address info for each instruction and block
51 StateVector
<IRInstruction
,TcaRange
> instRanges
;
52 StateVector
<Block
,TcaRange
> asmRanges
;
53 StateVector
<Block
,TcaRange
> acoldRanges
;
54 StateVector
<Block
,TcaRange
> afrozenRanges
;
56 void updateForInstruction(IRInstruction
* inst
, TCA start
, TCA end
);
59 typedef StateVector
<IRInstruction
, RegSet
> LiveRegs
;
62 /* afterCall is the address after the call instruction that this catch trace
63 * belongs to. It's the key used to look up catch traces by the
64 * unwinder, since it's the value of %rip during unwinding. */
67 /* savedRegs contains the caller-saved registers that were pushed onto the
68 * C++ stack at the time of the call. The catch trace will pop these
69 * registers (in the same order as PhysRegSaver's destructor) before doing
70 * any real work to restore the register state from before the call. */
73 /* rspOffset is the number of bytes pushed on the C++ stack after the
74 * registers in savedRegs were saved, typically from function calls with >6
75 * arguments. The catch trace will adjust rsp by this amount before popping
76 * anything in savedRegs. */
80 // Stuff we need to preserve between blocks while generating code,
81 // and address information produced during codegen.
83 CodegenState(const IRUnit
& unit
, const RegAllocInfo
& regs
,
84 const LiveRegs
& liveRegs
, AsmInfo
* asmInfo
)
85 : patches(unit
, nullptr)
86 , addresses(unit
, nullptr)
90 , catches(unit
, CatchInfo())
94 // Each block has a list of addresses to patch, and an address if
95 // it's already been emitted.
96 StateVector
<Block
,void*> patches
;
97 StateVector
<Block
,TCA
> addresses
;
99 // True if this block's terminal Jmp has a desination equal to the
100 // next block in the same assmbler.
103 // output from register allocator
104 const RegAllocInfo
& regs
;
106 // for each instruction, holds the RegSet of registers that must be
107 // preserved across that instruction. This is for push/pop of caller-saved
109 const LiveRegs
& liveRegs
;
111 // Output: start/end ranges of machine code addresses of each instruction.
114 // Used to pass information about the state of the world at native
115 // calls between cgCallHelper and cgBeginCatch.
116 StateVector
<Block
, CatchInfo
> catches
;
118 // Have we progressed past the guards? Used to suppress TransBCMappings until
119 // we're translating code that can properly be attributed to specific
124 LiveRegs
computeLiveRegs(const IRUnit
& unit
, const RegAllocInfo
& regs
);
126 void genCode(IRUnit
& unit
,
128 const RegAllocInfo
& regs
);
130 struct CodeGenerator
{
131 virtual ~CodeGenerator() {}
132 virtual void cgInst(IRInstruction
* inst
) = 0;