hphp/util/bitops.h

   1 /*
   2    +----------------------------------------------------------------------+
   3    | HipHop for PHP                                                       |
   4    +----------------------------------------------------------------------+
   5    | Copyright (c) 2010-2014 Facebook, Inc. (http://www.facebook.com)     |
   6    +----------------------------------------------------------------------+
   7    | This source file is subject to version 3.01 of the PHP license,      |
   8    | that is bundled with this package in the file LICENSE, and is        |
   9    | available through the world-wide-web at the following url:           |
  10    | http://www.php.net/license/3_01.txt                                  |
  11    | If you did not receive a copy of the PHP license and are unable to   |
  12    | obtain it through the world-wide-web, please send a note to          |
  13    | license@php.net so we can mail you a copy immediately.               |
  14    +----------------------------------------------------------------------+
  15 */
  16
  17 #ifndef incl_HPHP_BITOPS_H_
  18 #define incl_HPHP_BITOPS_H_
  19
  20 namespace HPHP {
  21
  22 // GLIBC doesn't provide an fls primitive. Since we're rolling our own
  23 // anyway, fix ffs's wacky offset-by-one historical implementation. These
  24 // guys return success/failure (failure for input of all zeros) and the
  25 // unoffset bit position in their reference param.
  26 template<typename I64>
  27 inline bool ffs64(I64 input, I64 &out) {
  28   bool retval;
  29 #if defined(__x86_64__)
  30   asm volatile (
  31     "bsfq  %2, %1\n\t"   // bit scan forward
  32     "setnz %0\n\t":      // zero retval if input == 0
  33     "=r"(retval), "=r"(out):
  34     "r"(input):
  35     "cc"
  36   );
  37 #elif defined(__AARCH64EL__)
  38   asm volatile (
  39     "rbit  %2, %2\n\t"  // reverse bits
  40     "clz   %1, %2\n\t"  // count leading zeros
  41     "cmp   %1, #64\n\t"
  42     "cset  %0, NE":     // return (result != 64)
  43     "=r"(retval), "=r"(out), "+r"(input):
  44     :
  45     "cc"
  46   );
  47 #endif
  48   return retval;
  49 }
  50
  51 template<typename I64>
  52 inline bool fls64(I64 input, I64 &out) {
  53   bool retval;
  54 #if defined(__x86_64__)
  55   asm volatile (
  56     "bsrq  %2, %1\n\t"   // bit scan reverse
  57     "setnz %0\n\t":      // zero retval if input == 0
  58     "=r"(retval), "=r"(out):
  59     "r"(input):
  60     "cc"
  61   );
  62 #elif defined(__AARCH64EL__)
  63   asm volatile (
  64     "clz   %1, %2\n\t"      // count leading zeros
  65     "neg   %1, %1\n\t"
  66     "adds  %1, %1, #63\n\t" // result = 63 - (# of leading zeros)
  67                             // "s" suffix sets condition flags
  68     "cset  %0, PL":         // return (result >= 0)
  69                             //   because result < 0 iff input == 0
  70     "=r"(retval), "=r"(out):
  71     "r"(input):
  72     "cc"
  73   );
  74 #endif
  75   return retval;
  76 }
  77
  78 } // HPHP
  79
  80 #endif