1 ## General configuration directives
4 @ "amd64" AMD64/Intel EM64T
8 @ "ppc32" PowerPC 32-bit
9 @ "ppc64" PowerPC 64-bit
10 @ "sparc64" Sun UltraSPARC 64-bit
15 @ "cross" Cross-compiler
20 @ "pentium4" Pentium 4
21 @ "pentium3" Pentium 3
22 @ "athlon-xp" Athlon XP
23 @ "athlon-mp" Athlon MP
25 ! [ARCH=ia32|ARCH=xen32] MACHINE (choice)
29 ! [ARCH=amd64] MACHINE (choice)
32 @ "msim" MSIM Simulator
33 @ "simics" Virtutech Simics simulator
34 @ "lgxemul" GXEmul Little Endian
35 @ "bgxemul" GXEmul Big Endian
37 ! [ARCH=mips32] MACHINE (choice)
41 @ "enterprise" Sun Enterprise E6500
42 ! [ARCH=sparc64] MACHINE (choice)
45 ! [(ARCH=mips32&MACHINE=lgxemul)|(ARCH=mips32&MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)] CONFIG_FB (y/n)
57 ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice)
70 ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_HEIGHT (choice)
76 ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_BPP (choice)
79 ! [ARCH=ia32|ARCH=amd64|ARCH=xen32] CONFIG_SMP (y/n)
81 # Improved support for hyperthreading
82 ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_SMP=y] CONFIG_HT (y/n)
84 # Simics BIOS AP boot fix
85 ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n)
87 # Lazy FPU context switching
88 ! [(ARCH=mips32&MACHINE!=msim&MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64|ARCH=sparc64|ARCH=xen32] CONFIG_FPU_LAZY (y/n)
91 ! [ARCH=ppc32] CONFIG_POWEROFF (n/y)
93 ## Debugging configuration directives
95 # General debuging and assert checking
98 # Deadlock detection support for spinlocks
99 ! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n)
101 # Watchpoint on rewriting AS with zero
102 ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32|ARCH=xen32)] CONFIG_DEBUG_AS_WATCHPOINT (y/n)
104 # Save all interrupt registers
105 ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32|ARCH=xen32)] CONFIG_DEBUG_ALLREGS (y/n)
108 ! [ARCH=ia64] CONFIG_VHPT (n/y)
111 ! [ARCH=sparc64] CONFIG_TSB (n/y)
113 ## Run-time configuration directives
117 @ "atomic/atomic1" Test of atomic operations.
118 @ "btree/btree1" B-tree test.
119 @ "synch/rwlock1" Read write test 1
120 @ "synch/rwlock2" Read write test 2
121 @ "synch/rwlock3" Read write test 3
122 @ "synch/rwlock4" Read write test 4
123 @ "synch/rwlock5" Read write test 5
124 @ "synch/semaphore1" Semaphore test 1
125 @ "synch/semaphore2" Sempahore test 2
126 @ [ARCH=ia32|ARCH=amd64|ARCH=ia64|ARCH=xen32] "fpu/fpu1" Intel FPU test 1
127 @ [ARCH=ia32|ARCH=amd64|ARCH=xen32] "fpu/sse1" Intel SSE test 1
128 @ [ARCH=mips32&MACHINE!=msim&MACHINE!=simics] "fpu/mips1" MIPS FPU test 1
129 @ "print/print1" Printf test 1
130 @ "thread/thread1" Thread test 1
131 @ "mm/mapping1" Mapping test 1
132 @ "mm/falloc1" Frame Allocation test 1
133 @ "mm/falloc2" Frame Allocation test 2
134 @ "mm/slab1" SLAB test1 - No CPU cache
135 @ "mm/slab2" SLAB test2 - SMP CPU cache
136 @ "fault/fault1" Write to NULL (maybe page fault)
137 @ "sysinfo" Sysinfo fill and dump test
138 @ [ARCH=ia64] "mm/purge1" Itanium TLB purge test
139 @ [ARCH=mips32] "debug/mips1" MIPS breakpoint-debug test
140 ! CONFIG_TEST (choice)