kernel/arch/mips32/src/interrupt.c

   1 /*
   2  * Copyright (c) 2003-2004 Jakub Jermar
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  *
   9  * - Redistributions of source code must retain the above copyright
  10  *   notice, this list of conditions and the following disclaimer.
  11  * - Redistributions in binary form must reproduce the above copyright
  12  *   notice, this list of conditions and the following disclaimer in the
  13  *   documentation and/or other materials provided with the distribution.
  14  * - The name of the author may not be used to endorse or promote products
  15  *   derived from this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 /** @addtogroup mips32interrupt
  30  * @{
  31  */
  32 /** @file
  33  */
  34
  35 #include <interrupt.h>
  36 #include <arch/interrupt.h>
  37 #include <arch/types.h>
  38 #include <arch.h>
  39 #include <arch/cp0.h>
  40 #include <time/clock.h>
  41 #include <arch/drivers/arc.h>
  42 #include <ipc/sysipc.h>
  43 #include <ddi/device.h>
  44 #include <ddi/irq.h>
  45
  46 #define IRQ_COUNT 8
  47 #define TIMER_IRQ 7
  48
  49 function virtual_timer_fnc = NULL;
  50 static irq_t timer_irq;
  51
  52 /** Disable interrupts.
  53  *
  54  * @return Old interrupt priority level.
  55  */
  56 ipl_t interrupts_disable(void)
  57 {
  58         ipl_t ipl = (ipl_t) cp0_status_read();
  59         cp0_status_write(ipl & ~cp0_status_ie_enabled_bit);
  60         return ipl;
  61 }
  62
  63 /** Enable interrupts.
  64  *
  65  * @return Old interrupt priority level.
  66  */
  67 ipl_t interrupts_enable(void)
  68 {
  69         ipl_t ipl = (ipl_t) cp0_status_read();
  70         cp0_status_write(ipl | cp0_status_ie_enabled_bit);
  71         return ipl;
  72 }
  73
  74 /** Restore interrupt priority level.
  75  *
  76  * @param ipl Saved interrupt priority level.
  77  */
  78 void interrupts_restore(ipl_t ipl)
  79 {
  80         cp0_status_write(cp0_status_read() | (ipl & cp0_status_ie_enabled_bit));
  81 }
  82
  83 /** Read interrupt priority level.
  84  *
  85  * @return Current interrupt priority level.
  86  */
  87 ipl_t interrupts_read(void)
  88 {
  89         return cp0_status_read();
  90 }
  91
  92 /* TODO: This is SMP unsafe!!! */
  93 static unsigned long nextcount;
  94 /** Start hardware clock */
  95 static void timer_start(void)
  96 {
  97         nextcount = cp0_compare_value + cp0_count_read();
  98         cp0_compare_write(nextcount);
  99 }
 100
 101 static irq_ownership_t timer_claim(void)
 102 {
 103         return IRQ_ACCEPT;
 104 }
 105
 106 static void timer_irq_handler(irq_t *irq, void *arg, ...)
 107 {
 108         unsigned long drift;
 109
 110         drift = cp0_count_read() - nextcount;
 111         while (drift > cp0_compare_value) {
 112                 drift -= cp0_compare_value;
 113                 CPU->missed_clock_ticks++;
 114         }
 115         nextcount = cp0_count_read() + cp0_compare_value - drift;
 116         cp0_compare_write(nextcount);
 117         clock();
 118
 119         if (virtual_timer_fnc != NULL)
 120                 virtual_timer_fnc();
 121 }
 122
 123 /* Initialize basic tables for exception dispatching */
 124 void interrupt_init(void)
 125 {
 126         irq_init(IRQ_COUNT, IRQ_COUNT);
 127
 128         irq_initialize(&timer_irq);
 129         timer_irq.devno = device_assign_devno();
 130         timer_irq.inr = TIMER_IRQ;
 131         timer_irq.claim = timer_claim;
 132         timer_irq.handler = timer_irq_handler;
 133         irq_register(&timer_irq);
 134
 135         timer_start();
 136         cp0_unmask_int(TIMER_IRQ);
 137 }
 138
 139 /** @}
 140  */