arch/ppc64/loader/regname.h

   1 /*
   2  * Copyright (C) 2005 Martin Decky
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  *
   9  * - Redistributions of source code must retain the above copyright
  10  *   notice, this list of conditions and the following disclaimer.
  11  * - Redistributions in binary form must reproduce the above copyright
  12  *   notice, this list of conditions and the following disclaimer in the
  13  *   documentation and/or other materials provided with the distribution.
  14  * - The name of the author may not be used to endorse or promote products
  15  *   derived from this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #ifndef __ppc32_REGNAME_H__
  30 #define __ppc32_REGNAME_H__
  31
  32 /* Condition Register Bit Fields */
  33 #define cr0     0
  34 #define cr1     1
  35 #define cr2     2
  36 #define cr3     3
  37 #define cr4     4
  38 #define cr5     5
  39 #define cr6     6
  40 #define cr7     7
  41
  42 /* General Purpose Registers (GPRs) */
  43 #define r0      0
  44 #define r1      1
  45 #define r2      2
  46 #define r3      3
  47 #define r4      4
  48 #define r5      5
  49 #define r6      6
  50 #define r7      7
  51 #define r8      8
  52 #define r9      9
  53 #define r10     10
  54 #define r11     11
  55 #define r12     12
  56 #define r13     13
  57 #define r14     14
  58 #define r15     15
  59 #define r16     16
  60 #define r17     17
  61 #define r18     18
  62 #define r19     19
  63 #define r20     20
  64 #define r21     21
  65 #define r22     22
  66 #define r23     23
  67 #define r24     24
  68 #define r25     25
  69 #define r26     26
  70 #define r27     27
  71 #define r28     28
  72 #define r29     29
  73 #define r30     30
  74 #define r31     31
  75
  76 /* GPR Aliases */
  77 #define sp      1
  78
  79 /* Floating Point Registers (FPRs) */
  80 #define fr0             0
  81 #define fr1             1
  82 #define fr2             2
  83 #define fr3             3
  84 #define fr4             4
  85 #define fr5             5
  86 #define fr6             6
  87 #define fr7             7
  88 #define fr8             8
  89 #define fr9             9
  90 #define fr10    10
  91 #define fr11    11
  92 #define fr12    12
  93 #define fr13    13
  94 #define fr14    14
  95 #define fr15    15
  96 #define fr16    16
  97 #define fr17    17
  98 #define fr18    18
  99 #define fr19    19
 100 #define fr20    20
 101 #define fr21    21
 102 #define fr22    22
 103 #define fr23    23
 104 #define fr24    24
 105 #define fr25    25
 106 #define fr26    26
 107 #define fr27    27
 108 #define fr28    28
 109 #define fr29    29
 110 #define fr30    30
 111 #define fr31    31
 112
 113 #define vr0             0
 114 #define vr1             1
 115 #define vr2             2
 116 #define vr3             3
 117 #define vr4             4
 118 #define vr5             5
 119 #define vr6             6
 120 #define vr7             7
 121 #define vr8             8
 122 #define vr9             9
 123 #define vr10    10
 124 #define vr11    11
 125 #define vr12    12
 126 #define vr13    13
 127 #define vr14    14
 128 #define vr15    15
 129 #define vr16    16
 130 #define vr17    17
 131 #define vr18    18
 132 #define vr19    19
 133 #define vr20    20
 134 #define vr21    21
 135 #define vr22    22
 136 #define vr23    23
 137 #define vr24    24
 138 #define vr25    25
 139 #define vr26    26
 140 #define vr27    27
 141 #define vr28    28
 142 #define vr29    29
 143 #define vr30    30
 144 #define vr31    31
 145
 146 #define evr0    0
 147 #define evr1    1
 148 #define evr2    2
 149 #define evr3    3
 150 #define evr4    4
 151 #define evr5    5
 152 #define evr6    6
 153 #define evr7    7
 154 #define evr8    8
 155 #define evr9    9
 156 #define evr10   10
 157 #define evr11   11
 158 #define evr12   12
 159 #define evr13   13
 160 #define evr14   14
 161 #define evr15   15
 162 #define evr16   16
 163 #define evr17   17
 164 #define evr18   18
 165 #define evr19   19
 166 #define evr20   20
 167 #define evr21   21
 168 #define evr22   22
 169 #define evr23   23
 170 #define evr24   24
 171 #define evr25   25
 172 #define evr26   26
 173 #define evr27   27
 174 #define evr28   28
 175 #define evr29   29
 176 #define evr30   30
 177 #define evr31   31
 178
 179 /* Special Purpose Registers (SPRs) */
 180 #define xer             1
 181 #define lr              8
 182 #define ctr             9
 183 #define dec             22
 184 #define sdr1    25
 185 #define srr0    26
 186 #define srr1    27
 187 #define sprg0   272
 188 #define sprg1   273
 189 #define sprg2   274
 190 #define sprg3   275
 191 #define prv             287
 192 #define hid0    1008
 193
 194 /* MSR bits */
 195 #define msr_ir  (1 << 4)
 196 #define msr_dr  (1 << 5)
 197
 198 /* HID0 bits */
 199 #define hid0_ice        (1 << 15)
 200 #define hid0_dce        (1 << 14)
 201 #define hid0_icfi       (1 << 11)
 202 #define hid0_dci        (1 << 10)
 203
 204 #endif