uspace/lib/virtio/virtio-pci.c

   1 /*
   2  * Copyright (c) 2018 Jakub Jermar
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  *
   9  * - Redistributions of source code must retain the above copyright
  10  *   notice, this list of conditions and the following disclaimer.
  11  * - Redistributions in binary form must reproduce the above copyright
  12  *   notice, this list of conditions and the following disclaimer in the
  13  *   documentation and/or other materials provided with the distribution.
  14  * - The name of the author may not be used to endorse or promote products
  15  *   derived from this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 /** @file VIRTIO support
  30  */
  31
  32 #include "virtio-pci.h"
  33
  34 #include <ddf/driver.h>
  35 #include <ddf/log.h>
  36 #include <pci_dev_iface.h>
  37
  38 static bool check_bar(virtio_dev_t *vdev, uint8_t bar, uint32_t offset,
  39     uint32_t length)
  40 {
  41         /* We must ignore the capability if bar is greater than 5 */
  42         if (bar >= PCI_BAR_COUNT)
  43                 return false;
  44
  45         /* This is not a mapped BAR */
  46         if (!vdev->bar[bar].mapped)
  47                 return false;
  48
  49         uintptr_t start = (uintptr_t) vdev->bar[bar].mapped_base;
  50         if (start + offset < start)
  51                 return false;
  52         if (start + offset > start + vdev->bar[bar].mapped_size)
  53                 return false;
  54         if (start + offset + length < start + offset)
  55                 return false;
  56         if (start + offset + length > start + vdev->bar[bar].mapped_size)
  57                 return false;
  58
  59         return true;
  60 }
  61
  62 static void virtio_pci_common_cfg(virtio_dev_t *vdev, uint8_t bar,
  63     uint32_t offset, uint32_t length)
  64 {
  65         if (vdev->common_cfg)
  66                 return;
  67
  68         if (!check_bar(vdev, bar, offset, length))
  69                 return;
  70
  71         vdev->common_cfg = vdev->bar[bar].mapped_base + offset;
  72
  73         ddf_msg(LVL_NOTE, "common_cfg=%p", vdev->common_cfg);
  74 }
  75
  76 static void virtio_pci_notify_cfg(virtio_dev_t *vdev, uint8_t bar,
  77     uint32_t offset, uint32_t length, uint32_t multiplier)
  78 {
  79         if (vdev->notify_base)
  80                 return;
  81
  82         if (!check_bar(vdev, bar, offset, length))
  83                 return;
  84
  85         vdev->notify_base = vdev->bar[bar].mapped_base + offset;
  86         vdev->notify_off_multiplier = multiplier;
  87
  88         ddf_msg(LVL_NOTE, "notify_base=%p, off_multiplier=%u",
  89             vdev->notify_base, vdev->notify_off_multiplier);
  90 }
  91
  92 static void virtio_pci_isr_cfg(virtio_dev_t *vdev, uint8_t bar, uint32_t offset,
  93     uint32_t length)
  94 {
  95         if (vdev->isr)
  96                 return;
  97
  98         if (!check_bar(vdev, bar, offset, length))
  99                 return;
 100
 101         vdev->isr = vdev->bar[bar].mapped_base + offset;
 102
 103         ddf_msg(LVL_NOTE, "isr=%p", vdev->isr);
 104 }
 105
 106 static void virtio_pci_device_cfg(virtio_dev_t *vdev, uint8_t bar,
 107     uint32_t offset, uint32_t length)
 108 {
 109         if (vdev->device_cfg)
 110                 return;
 111
 112         if (!check_bar(vdev, bar, offset, length))
 113                 return;
 114
 115         vdev->device_cfg = vdev->bar[bar].mapped_base + offset;
 116
 117         ddf_msg(LVL_NOTE, "device_cfg=%p", vdev->device_cfg);
 118 }
 119
 120 static errno_t enable_resources(async_sess_t *pci_sess, virtio_dev_t *vdev)
 121 {
 122         pio_window_t pio_window;
 123         errno_t rc = pio_window_get(pci_sess, &pio_window);
 124         if (rc != EOK)
 125                 return rc;
 126
 127         hw_resource_list_t hw_res;
 128         rc = hw_res_get_resource_list(pci_sess, &hw_res);
 129         if (rc != EOK)
 130                 return rc;
 131
 132         /*
 133          * Enable resources and reconstruct the mapping between BAR and resource
 134          * indices. We are going to need this later when the VIRTIO PCI
 135          * capabilities refer to specific BARs.
 136          *
 137          * XXX: The mapping should probably be provided by the PCI driver
 138          *      itself.
 139          */
 140         for (unsigned i = 0, j = 0; i < PCI_BAR_COUNT && j < hw_res.count;
 141             i++) {
 142                 /* Detect and skip unused BARs */
 143                 uint32_t bar;
 144                 rc = pci_config_space_read_32(pci_sess,
 145                     PCI_BAR0 + i * sizeof(uint32_t), &bar);
 146                 if (rc != EOK)
 147                         return rc;
 148                 if (!bar)
 149                         continue;
 150
 151                 hw_resource_t *res = &hw_res.resources[j];
 152                 rc = pio_enable_resource(&pio_window, res,
 153                     &vdev->bar[i].mapped_base, &vdev->bar[i].mapped_size);
 154                 if (rc == EOK)
 155                         vdev->bar[i].mapped = true;
 156                 j++;
 157         }
 158
 159         return rc;
 160 }
 161
 162 static errno_t disable_resources(virtio_dev_t *vdev)
 163 {
 164         for (unsigned i = 0; i < PCI_BAR_COUNT; i++) {
 165                 if (vdev->bar[i].mapped) {
 166                         errno_t rc = pio_disable(vdev->bar[i].mapped_base,
 167                             vdev->bar[i].mapped_size);
 168                         if (rc != EOK)
 169                                 return rc;
 170                         vdev->bar[i].mapped = false;
 171                 }
 172         }
 173
 174         return EOK;
 175 }
 176
 177 errno_t virtio_pci_dev_initialize(ddf_dev_t *dev, virtio_dev_t *vdev)
 178 {
 179         memset(vdev, 0, sizeof(virtio_dev_t));
 180
 181         async_sess_t *pci_sess = ddf_dev_parent_sess_get(dev);
 182         if (!pci_sess)
 183                 return ENOENT;
 184
 185         errno_t rc = enable_resources(pci_sess, vdev);
 186         if (rc != EOK)
 187                 goto error;
 188
 189         /*
 190          * Find the VIRTIO PCI Capabilities
 191          */
 192         uint8_t c;
 193         uint8_t cap_vndr;
 194         for (rc = pci_config_space_cap_first(pci_sess, &c, &cap_vndr);
 195             (rc == EOK) && c;
 196             rc = pci_config_space_cap_next(pci_sess, &c, &cap_vndr)) {
 197                 if (cap_vndr != PCI_CAP_VENDORSPECID)
 198                         continue;
 199
 200                 uint8_t cap_len;
 201                 rc = pci_config_space_read_8(pci_sess,
 202                     VIRTIO_PCI_CAP_CAP_LEN(c), &cap_len);
 203                 if (rc != EOK)
 204                         goto error;
 205
 206                 if (cap_len < VIRTIO_PCI_CAP_END(0)) {
 207                         rc = EINVAL;
 208                         goto error;
 209                 }
 210
 211                 uint8_t cfg_type;
 212                 rc = pci_config_space_read_8(pci_sess,
 213                     VIRTIO_PCI_CAP_CFG_TYPE(c), &cfg_type);
 214                 if (rc != EOK)
 215                         goto error;
 216
 217                 uint8_t bar;
 218                 rc = pci_config_space_read_8(pci_sess, VIRTIO_PCI_CAP_BAR(c),
 219                     &bar);
 220                 if (rc != EOK)
 221                         goto error;
 222
 223                 uint32_t offset;
 224                 rc = pci_config_space_read_32(pci_sess,
 225                     VIRTIO_PCI_CAP_OFFSET(c), &offset);
 226                 if (rc != EOK)
 227                         goto error;
 228
 229                 uint32_t length;
 230                 rc = pci_config_space_read_32(pci_sess,
 231                     VIRTIO_PCI_CAP_LENGTH(c), &length);
 232                 if (rc != EOK)
 233                         goto error;
 234
 235                 uint32_t multiplier;
 236                 switch (cfg_type) {
 237                 case VIRTIO_PCI_CAP_COMMON_CFG:
 238                         virtio_pci_common_cfg(vdev, bar, offset, length);
 239                         break;
 240                 case VIRTIO_PCI_CAP_NOTIFY_CFG:
 241                         if (cap_len < VIRTIO_PCI_CAP_END(sizeof(uint32_t))) {
 242                                 rc = EINVAL;
 243                                 goto error;
 244                         }
 245                         rc = pci_config_space_read_32(pci_sess,
 246                             VIRTIO_PCI_CAP_END(c), &multiplier);
 247                         if (rc != EOK)
 248                                 goto error;
 249                         virtio_pci_notify_cfg(vdev, bar, offset, length,
 250                             multiplier);
 251                         break;
 252                 case VIRTIO_PCI_CAP_ISR_CFG:
 253                         virtio_pci_isr_cfg(vdev, bar, offset, length);
 254                         break;
 255                 case VIRTIO_PCI_CAP_DEVICE_CFG:
 256                         virtio_pci_device_cfg(vdev, bar, offset, length);
 257                         break;
 258                 case VIRTIO_PCI_CAP_PCI_CFG:
 259                         break;
 260                 default:
 261                         break;
 262                 }
 263         }
 264
 265         /* Check that the configuration is complete */
 266         if (!vdev->common_cfg || !vdev->notify_base || !vdev->isr ||
 267             !vdev->device_cfg) {
 268                 rc = EINVAL;
 269                 goto error;
 270         }
 271
 272         return rc;
 273
 274 error:
 275         (void) disable_resources(vdev);
 276         return rc;
 277 }
 278
 279 errno_t virtio_pci_dev_cleanup(virtio_dev_t *vdev)
 280 {
 281         if (vdev->queues) {
 282                 for (unsigned i = 0;
 283                     i < pio_read_le16(&vdev->common_cfg->num_queues); i++)
 284                         virtio_virtq_teardown(vdev, i);
 285                 free(vdev->queues);
 286         }
 287         return disable_resources(vdev);
 288 }
 289
 290 /** @}
 291  */