2 * Copyright (c) 2018 Jakub Jermar
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 #ifndef _VIRTIO_NET_H_
30 #define _VIRTIO_NET_H_
32 #include <virtio-pci.h>
40 /** Device handles packets with partial checksum. */
41 #define VIRTIO_NET_F_CSUM (1U << 0)
42 /** Driver handles packets with partial checksum. */
43 #define VIRTIO_NET_F_GUEST_CSUM (1U << 2)
44 /** Device has given MAC address. */
45 #define VIRTIO_NET_F_MAC (1U << 5)
46 /** Control channel is available */
47 #define VIRTIO_NET_F_CTRL_VQ (1U << 17)
49 #define VIRTIO_NET_HDR_GSO_NONE 0
57 // XXX: QEMU uses the legacy layout for some reason
58 // uint16_t num_buffers;
62 uint8_t mac
[ETH_ADDR
];
66 virtio_dev_t virtio_dev
;
67 void *rx_buf
[RX_BUFFERS
];
68 uintptr_t rx_buf_p
[RX_BUFFERS
];
69 void *tx_buf
[TX_BUFFERS
];
70 uintptr_t tx_buf_p
[TX_BUFFERS
];
71 void *ct_buf
[CT_BUFFERS
];
72 uintptr_t ct_buf_p
[CT_BUFFERS
];
74 uint16_t tx_free_head
;
75 uint16_t ct_free_head
;
78 cap_irq_handle_t irq_handle
;