2 * Copyright (c) 2018 Jakub Jermar
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 /** @file VIRTIO PCI definitions
32 #ifndef _VIRTIO_PCI_H_
33 #define _VIRTIO_PCI_H_
35 #include <ddf/driver.h>
36 #include <pci_dev_iface.h>
39 #define VIRTIO_PCI_CAP_CAP_LEN(c) ((c) + 2)
40 #define VIRTIO_PCI_CAP_CFG_TYPE(c) ((c) + 3)
41 #define VIRTIO_PCI_CAP_BAR(c) ((c) + 4)
42 #define VIRTIO_PCI_CAP_OFFSET(c) ((c) + 8)
43 #define VIRTIO_PCI_CAP_LENGTH(c) ((c) + 12)
44 #define VIRTIO_PCI_CAP_END(c) ((c) + 16)
46 #define VIRTIO_PCI_CAP_COMMON_CFG 1
47 #define VIRTIO_PCI_CAP_NOTIFY_CFG 2
48 #define VIRTIO_PCI_CAP_ISR_CFG 3
49 #define VIRTIO_PCI_CAP_DEVICE_CFG 4
50 #define VIRTIO_PCI_CAP_PCI_CFG 5
52 #define VIRTIO_DEV_STATUS_RESET 0
53 #define VIRTIO_DEV_STATUS_ACKNOWLEDGE 1
54 #define VIRTIO_DEV_STATUS_DRIVER 2
55 #define VIRTIO_DEV_STATUS_DRIVER_OK 4
56 #define VIRTIO_DEV_STATUS_FEATURES_OK 8
57 #define VIRTIO_DEV_STATUS_DEVICE_NEEDS_RESET 64
58 #define VIRTIO_DEV_STATUS_FAILED 128
60 #define VIRTIO_FEATURES_0_31 0
62 /** Common configuration structure layout according to VIRTIO version 1.0 */
63 typedef struct virtio_pci_common_cfg
{
64 ioport32_t device_feature_select
;
65 const ioport32_t device_feature
;
66 ioport32_t driver_feature_select
;
67 ioport32_t driver_feature
;
68 ioport16_t msix_config
;
69 const ioport16_t num_queues
;
70 ioport8_t device_status
;
71 const ioport8_t config_generation
;
72 ioport16_t queue_select
;
73 ioport16_t queue_size
;
74 ioport16_t queue_msix_vector
;
75 ioport16_t queue_enable
;
76 const ioport16_t queue_notif_off
;
77 ioport64_t queue_desc
;
78 ioport64_t queue_avail
;
79 ioport64_t queue_used
;
80 } virtio_pci_common_cfg_t
;
82 /** The buffer continues in the next descriptor */
83 #define VIRTQ_DESC_F_NEXT 1
84 /** Device write-only buffer */
85 #define VIRTQ_DESC_F_WRITE 2
86 /** Buffer contains a list of buffer descriptors */
87 #define VIRTQ_DESC_F_INDIRECT 4
89 /** Virtqueue Descriptor structure as per VIRTIO version 1.0 */
90 typedef struct virtq_desc
{
91 ioport64_t addr
; /**< Buffer physical address */
92 ioport32_t len
; /**< Buffer length */
93 ioport16_t flags
; /**< Buffer flags */
94 ioport16_t next
; /**< Continuation descriptor */
97 #define VIRTQ_AVAIL_F_NO_INTERRUPT 1
99 /** Virtqueue Available Ring as per VIRTIO version 1.0 */
100 typedef struct virtq_avail
{
105 * We do not define the optional used_event member here in order to be
106 * able to define ring as a variable-length array.
110 typedef struct virtq_used_elem
{
115 #define VIRTQ_USED_F_NO_NOTIFY 1
117 /** Virtqueue Used Ring as per VIRTIO version 1.0 */
118 typedef struct virtq_used
{
121 virtq_used_elem_t ring
[];
123 * We do not define the optional avail_event member here in order to be
124 * able to define ring as a variable-length array.
134 * Size of the queue which determines the number of descriptors and
139 /** Virtual address of queue size virtq descriptors */
141 /** Virtual address of the available ring */
142 virtq_avail_t
*avail
;
143 /** Virtual address of the used ring */
147 * Queue-size-sized array of virtual addresses of the atcual DMA
153 /** VIRTIO-device specific data associated with the NIC framework nic_t */
159 } bar
[PCI_BAR_COUNT
];
161 /** Commong configuration structure */
162 virtio_pci_common_cfg_t
*common_cfg
;
164 /** Notification base address */
165 ioport16_t
*notify_base
;
166 /** Notification offset multiplier */
167 uint32_t notify_off_multiplier
;
169 /** INT#x interrupt ISR register */
172 /** Device-specific configuration */
179 extern errno_t
virtio_virtq_setup(virtio_dev_t
*, uint16_t, uint16_t, size_t,
181 extern void virtio_virtq_teardown(virtio_dev_t
*, uint16_t);
183 extern errno_t
virtio_device_setup_start(virtio_dev_t
*, uint32_t);
184 extern void virtio_device_setup_fail(virtio_dev_t
*);
185 extern void virtio_device_setup_finalize(virtio_dev_t
*);
187 extern errno_t
virtio_pci_dev_initialize(ddf_dev_t
*, virtio_dev_t
*);
188 extern errno_t
virtio_pci_dev_cleanup(virtio_dev_t
*);