2 * Copyright (c) 2011 Zdenek Bouska
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * Driver for Intel Pro/1000 8254x Family of Gigabit Ethernet Controllers
41 #include <byteorder.h>
45 #include <ddf/interrupt.h>
46 #include <device/hw_res.h>
47 #include <device/hw_res_parsed.h>
48 #include <pci_dev_iface.h>
55 #define E1000_DEFAULT_INTERRUPT_INTERVAL_USEC 250
57 /* Must be power of 8 */
58 #define E1000_RX_FRAME_COUNT 128
59 #define E1000_TX_FRAME_COUNT 128
61 #define E1000_RECEIVE_ADDRESS 16
63 /** Maximum sending frame size */
64 #define E1000_MAX_SEND_FRAME_SIZE 2048
65 /** Maximum receiving frame size */
66 #define E1000_MAX_RECEIVE_FRAME_SIZE 2048
68 /** nic_driver_data_t* -> e1000_t* cast */
69 #define DRIVER_DATA_NIC(nic) \
70 ((e1000_t *) nic_get_specific(nic))
72 /** ddf_fun_t * -> nic_driver_data_t* cast */
73 #define NIC_DATA_FUN(fun) \
74 ((nic_t *) ddf_dev_data_get(ddf_fun_get_dev(fun)))
76 /** ddf_dev_t * -> nic_driver_data_t* cast */
77 #define NIC_DATA_DEV(dev) \
78 ((nic_t *) ddf_dev_data_get(dev))
80 /** ddf_dev_t * -> e1000_t* cast */
81 #define DRIVER_DATA_DEV(dev) \
82 (DRIVER_DATA_NIC(NIC_DATA_DEV(dev)))
84 /** ddf_fun_t * -> e1000_t* cast */
85 #define DRIVER_DATA_FUN(fun) \
86 (DRIVER_DATA_NIC(NIC_DATA_FUN(fun)))
88 /** Cast pointer to uint64_t
90 * @param ptr Pointer to cast
92 * @return The uint64_t pointer representation.
95 #define PTR_TO_U64(ptr) ((uint64_t) ((uintptr_t) (ptr)))
97 /** Cast the memaddr part to the void*
99 * @param memaddr The memaddr value
102 #define MEMADDR_TO_PTR(memaddr) ((void *) ((size_t) (memaddr)))
104 #define E1000_REG_BASE(e1000) \
105 ((e1000)->reg_base_virt)
107 #define E1000_REG_ADDR(e1000, reg) \
108 ((uint32_t *) (E1000_REG_BASE(e1000) + reg))
110 #define E1000_REG_READ(e1000, reg) \
111 (pio_read_32(E1000_REG_ADDR(e1000, reg)))
113 #define E1000_REG_WRITE(e1000, reg, value) \
114 (pio_write_32(E1000_REG_ADDR(e1000, reg), value))
116 /** E1000 device data */
120 /** Parent session */
121 async_sess_t
*parent_sess
;
122 /** Device configuration */
125 /** Physical registers base address */
127 /** Virtual registers base address */
130 /** Physical tx ring address */
131 uintptr_t tx_ring_phys
;
132 /** Virtual tx ring address */
135 /** Ring of TX frames, physical address */
136 uintptr_t *tx_frame_phys
;
137 /** Ring of TX frames, virtual address */
138 void **tx_frame_virt
;
140 /** Physical rx ring address */
141 uintptr_t rx_ring_phys
;
142 /** Virtual rx ring address */
145 /** Ring of RX frames, physical address */
146 uintptr_t *rx_frame_phys
;
147 /** Ring of RX frames, virtual address */
148 void **rx_frame_virt
;
153 /** Add VLAN tag to frame */
156 /** Used unicast Receive Address count */
157 unsigned int unicast_ra_count
;
159 /** Used milticast Receive addrress count */
160 unsigned int multicast_ra_count
;
162 /** The irq assigned */
165 /** Lock for CTRL register */
166 fibril_mutex_t ctrl_lock
;
168 /** Lock for receiver */
169 fibril_mutex_t rx_lock
;
171 /** Lock for transmitter */
172 fibril_mutex_t tx_lock
;
174 /** Lock for EEPROM access */
175 fibril_mutex_t eeprom_lock
;
178 /** Global mutex for work with shared irq structure */
179 FIBRIL_MUTEX_INITIALIZE(irq_reg_mutex
);
181 static errno_t
e1000_get_address(e1000_t
*, nic_address_t
*);
182 static void e1000_eeprom_get_address(e1000_t
*, nic_address_t
*);
183 static errno_t
e1000_set_addr(ddf_fun_t
*, const nic_address_t
*);
185 static errno_t
e1000_defective_get_mode(ddf_fun_t
*, uint32_t *);
186 static errno_t
e1000_defective_set_mode(ddf_fun_t
*, uint32_t);
188 static errno_t
e1000_get_cable_state(ddf_fun_t
*, nic_cable_state_t
*);
189 static errno_t
e1000_get_device_info(ddf_fun_t
*, nic_device_info_t
*);
190 static errno_t
e1000_get_operation_mode(ddf_fun_t
*, int *,
191 nic_channel_mode_t
*, nic_role_t
*);
192 static errno_t
e1000_set_operation_mode(ddf_fun_t
*, int,
193 nic_channel_mode_t
, nic_role_t
);
194 static errno_t
e1000_autoneg_enable(ddf_fun_t
*, uint32_t);
195 static errno_t
e1000_autoneg_disable(ddf_fun_t
*);
196 static errno_t
e1000_autoneg_restart(ddf_fun_t
*);
198 static errno_t
e1000_vlan_set_tag(ddf_fun_t
*, uint16_t, bool, bool);
200 /** Network interface options for E1000 card driver */
201 static nic_iface_t e1000_nic_iface
;
203 /** Network interface options for E1000 card driver */
204 static nic_iface_t e1000_nic_iface
= {
205 .set_address
= &e1000_set_addr
,
206 .get_device_info
= &e1000_get_device_info
,
207 .get_cable_state
= &e1000_get_cable_state
,
208 .get_operation_mode
= &e1000_get_operation_mode
,
209 .set_operation_mode
= &e1000_set_operation_mode
,
210 .autoneg_enable
= &e1000_autoneg_enable
,
211 .autoneg_disable
= &e1000_autoneg_disable
,
212 .autoneg_restart
= &e1000_autoneg_restart
,
213 .vlan_set_tag
= &e1000_vlan_set_tag
,
214 .defective_get_mode
= &e1000_defective_get_mode
,
215 .defective_set_mode
= &e1000_defective_set_mode
,
218 /** Basic device operations for E1000 driver */
219 static ddf_dev_ops_t e1000_dev_ops
;
221 static errno_t
e1000_dev_add(ddf_dev_t
*);
223 /** Basic driver operations for E1000 driver */
224 static driver_ops_t e1000_driver_ops
= {
225 .dev_add
= e1000_dev_add
228 /** Driver structure for E1000 driver */
229 static driver_t e1000_driver
= {
231 .driver_ops
= &e1000_driver_ops
234 /* The default implementation callbacks */
235 static errno_t
e1000_on_activating(nic_t
*);
236 static errno_t
e1000_on_stopping(nic_t
*);
237 static void e1000_send_frame(nic_t
*, void *, size_t);
239 /** PIO ranges used in the IRQ code. */
240 irq_pio_range_t e1000_irq_pio_ranges
[] = {
243 .size
= PAGE_SIZE
, /* XXX */
247 /** Commands to deal with interrupt
250 irq_cmd_t e1000_irq_commands
[] = {
252 /* Get the interrupt status */
253 .cmd
= CMD_PIO_READ_32
,
258 .cmd
= CMD_PREDICATE
,
263 /* Disable interrupts until interrupt routine is finished */
264 .cmd
= CMD_PIO_WRITE_32
,
273 /** Interrupt code definition */
274 irq_code_t e1000_irq_code
= {
275 .rangecount
= sizeof(e1000_irq_pio_ranges
) /
276 sizeof(irq_pio_range_t
),
277 .ranges
= e1000_irq_pio_ranges
,
278 .cmdcount
= sizeof(e1000_irq_commands
) / sizeof(irq_cmd_t
),
279 .cmds
= e1000_irq_commands
282 /** Get the device information
284 * @param dev NIC device
285 * @param info Information to fill
290 static errno_t
e1000_get_device_info(ddf_fun_t
*dev
, nic_device_info_t
*info
)
295 memset(info
, 0, sizeof(nic_device_info_t
));
297 info
->vendor_id
= 0x8086;
298 str_cpy(info
->vendor_name
, NIC_VENDOR_MAX_LENGTH
,
299 "Intel Corporation");
300 str_cpy(info
->model_name
, NIC_MODEL_MAX_LENGTH
,
303 info
->ethernet_support
[ETH_10M
] = ETH_10BASE_T
;
304 info
->ethernet_support
[ETH_100M
] = ETH_100BASE_TX
;
305 info
->ethernet_support
[ETH_1000M
] = ETH_1000BASE_T
;
310 /** Check the cable state
312 * @param[in] dev device
313 * @param[out] state state to fill
318 static errno_t
e1000_get_cable_state(ddf_fun_t
*fun
, nic_cable_state_t
*state
)
320 e1000_t
*e1000
= DRIVER_DATA_FUN(fun
);
321 if (E1000_REG_READ(e1000
, E1000_STATUS
) & (STATUS_LU
))
322 *state
= NIC_CS_PLUGGED
;
324 *state
= NIC_CS_UNPLUGGED
;
329 static uint16_t e1000_calculate_itr_interval_from_usecs(suseconds_t useconds
)
334 /** Get operation mode of the device
337 static errno_t
e1000_get_operation_mode(ddf_fun_t
*fun
, int *speed
,
338 nic_channel_mode_t
*duplex
, nic_role_t
*role
)
340 e1000_t
*e1000
= DRIVER_DATA_FUN(fun
);
341 uint32_t status
= E1000_REG_READ(e1000
, E1000_STATUS
);
343 if (status
& STATUS_FD
)
344 *duplex
= NIC_CM_FULL_DUPLEX
;
346 *duplex
= NIC_CM_HALF_DUPLEX
;
348 uint32_t speed_bits
=
349 (status
>> STATUS_SPEED_SHIFT
) & STATUS_SPEED_ALL
;
351 if (speed_bits
== STATUS_SPEED_10
)
353 else if (speed_bits
== STATUS_SPEED_100
)
355 else if ((speed_bits
== STATUS_SPEED_1000A
) ||
356 (speed_bits
== STATUS_SPEED_1000B
))
359 *role
= NIC_ROLE_UNKNOWN
;
363 static void e1000_link_restart(e1000_t
*e1000
)
365 fibril_mutex_lock(&e1000
->ctrl_lock
);
367 uint32_t ctrl
= E1000_REG_READ(e1000
, E1000_CTRL
);
369 if (ctrl
& CTRL_SLU
) {
371 E1000_REG_WRITE(e1000
, E1000_CTRL
, ctrl
);
372 fibril_mutex_unlock(&e1000
->ctrl_lock
);
376 fibril_mutex_lock(&e1000
->ctrl_lock
);
377 ctrl
= E1000_REG_READ(e1000
, E1000_CTRL
);
379 E1000_REG_WRITE(e1000
, E1000_CTRL
, ctrl
);
382 fibril_mutex_unlock(&e1000
->ctrl_lock
);
385 /** Set operation mode of the device
388 static errno_t
e1000_set_operation_mode(ddf_fun_t
*fun
, int speed
,
389 nic_channel_mode_t duplex
, nic_role_t role
)
391 if ((speed
!= 10) && (speed
!= 100) && (speed
!= 1000))
394 if ((duplex
!= NIC_CM_HALF_DUPLEX
) && (duplex
!= NIC_CM_FULL_DUPLEX
))
397 e1000_t
*e1000
= DRIVER_DATA_FUN(fun
);
399 fibril_mutex_lock(&e1000
->ctrl_lock
);
400 uint32_t ctrl
= E1000_REG_READ(e1000
, E1000_CTRL
);
403 ctrl
|= CTRL_FRCDPLX
;
404 ctrl
&= ~(CTRL_ASDE
);
406 if (duplex
== NIC_CM_FULL_DUPLEX
)
411 ctrl
&= ~(CTRL_SPEED_MASK
);
413 ctrl
|= CTRL_SPEED_1000
<< CTRL_SPEED_SHIFT
;
414 else if (speed
== 100)
415 ctrl
|= CTRL_SPEED_100
<< CTRL_SPEED_SHIFT
;
417 ctrl
|= CTRL_SPEED_10
<< CTRL_SPEED_SHIFT
;
419 E1000_REG_WRITE(e1000
, E1000_CTRL
, ctrl
);
421 fibril_mutex_unlock(&e1000
->ctrl_lock
);
423 e1000_link_restart(e1000
);
428 /** Enable auto-negotiation
430 * @param dev Device to update
431 * @param advertisement Ignored on E1000
433 * @return EOK if advertisement mode set successfully
436 static errno_t
e1000_autoneg_enable(ddf_fun_t
*fun
, uint32_t advertisement
)
438 e1000_t
*e1000
= DRIVER_DATA_FUN(fun
);
440 fibril_mutex_lock(&e1000
->ctrl_lock
);
442 uint32_t ctrl
= E1000_REG_READ(e1000
, E1000_CTRL
);
444 ctrl
&= ~(CTRL_FRCSPD
);
445 ctrl
&= ~(CTRL_FRCDPLX
);
448 E1000_REG_WRITE(e1000
, E1000_CTRL
, ctrl
);
450 fibril_mutex_unlock(&e1000
->ctrl_lock
);
452 e1000_link_restart(e1000
);
457 /** Disable auto-negotiation
459 * @param dev Device to update
464 static errno_t
e1000_autoneg_disable(ddf_fun_t
*fun
)
466 e1000_t
*e1000
= DRIVER_DATA_FUN(fun
);
468 fibril_mutex_lock(&e1000
->ctrl_lock
);
470 uint32_t ctrl
= E1000_REG_READ(e1000
, E1000_CTRL
);
473 ctrl
|= CTRL_FRCDPLX
;
474 ctrl
&= ~(CTRL_ASDE
);
476 E1000_REG_WRITE(e1000
, E1000_CTRL
, ctrl
);
478 fibril_mutex_unlock(&e1000
->ctrl_lock
);
480 e1000_link_restart(e1000
);
485 /** Restart auto-negotiation
487 * @param dev Device to update
489 * @return EOK if advertisement mode set successfully
492 static errno_t
e1000_autoneg_restart(ddf_fun_t
*dev
)
494 return e1000_autoneg_enable(dev
, 0);
497 /** Get state of acceptance of weird frames
499 * @param device Device to check
500 * @param[out] mode Current mode
503 static errno_t
e1000_defective_get_mode(ddf_fun_t
*fun
, uint32_t *mode
)
505 e1000_t
*e1000
= DRIVER_DATA_FUN(fun
);
508 uint32_t rctl
= E1000_REG_READ(e1000
, E1000_RCTL
);
510 *mode
= NIC_DEFECTIVE_BAD_CRC
| NIC_DEFECTIVE_SHORT
;
515 /** Set acceptance of weird frames
517 * @param device Device to update
518 * @param mode Mode to set
520 * @return ENOTSUP if the mode is not supported
521 * @return EOK of mode was set
524 static errno_t
e1000_defective_set_mode(ddf_fun_t
*fun
, uint32_t mode
)
526 e1000_t
*e1000
= DRIVER_DATA_FUN(fun
);
529 fibril_mutex_lock(&e1000
->rx_lock
);
531 uint32_t rctl
= E1000_REG_READ(e1000
, E1000_RCTL
);
532 bool short_mode
= (mode
& NIC_DEFECTIVE_SHORT
? true : false);
533 bool bad_mode
= (mode
& NIC_DEFECTIVE_BAD_CRC
? true : false);
535 if (short_mode
&& bad_mode
)
537 else if ((!short_mode
) && (!bad_mode
))
542 E1000_REG_WRITE(e1000
, E1000_RCTL
, rctl
);
544 fibril_mutex_unlock(&e1000
->rx_lock
);
548 /** Write receive address to RA registr
550 * @param e1000 E1000 data structure
551 * @param position RA register position
552 * @param address Ethernet address
553 * @param set_av_bit Set the Addtess Valid bit
556 static void e1000_write_receive_address(e1000_t
*e1000
, unsigned int position
,
557 const nic_address_t
*address
, bool set_av_bit
)
559 uint8_t *mac0
= (uint8_t *) address
->address
;
560 uint8_t *mac1
= (uint8_t *) address
->address
+ 1;
561 uint8_t *mac2
= (uint8_t *) address
->address
+ 2;
562 uint8_t *mac3
= (uint8_t *) address
->address
+ 3;
563 uint8_t *mac4
= (uint8_t *) address
->address
+ 4;
564 uint8_t *mac5
= (uint8_t *) address
->address
+ 5;
569 ral
= ((*mac3
) << 24) | ((*mac2
) << 16) | ((*mac1
) << 8) | (*mac0
);
570 rah
= ((*mac5
) << 8) | ((*mac4
));
575 rah
|= E1000_REG_READ(e1000
, E1000_RAH_ARRAY(position
)) & RAH_AV
;
577 E1000_REG_WRITE(e1000
, E1000_RAH_ARRAY(position
), rah
);
578 E1000_REG_WRITE(e1000
, E1000_RAL_ARRAY(position
), ral
);
581 /** Disable receive address in RA registr
583 * Clear Address Valid bit
585 * @param e1000 E1000 data structure
586 * @param position RA register position
589 static void e1000_disable_receive_address(e1000_t
*e1000
, unsigned int position
)
591 uint32_t rah
= E1000_REG_READ(e1000
, E1000_RAH_ARRAY(position
));
593 E1000_REG_WRITE(e1000
, E1000_RAH_ARRAY(position
), rah
);
596 /** Clear all unicast addresses from RA registers
598 * @param e1000 E1000 data structure
601 static void e1000_clear_unicast_receive_addresses(e1000_t
*e1000
)
603 for (unsigned int ra_num
= 1;
604 ra_num
<= e1000
->unicast_ra_count
;
606 e1000_disable_receive_address(e1000
, ra_num
);
608 e1000
->unicast_ra_count
= 0;
611 /** Clear all multicast addresses from RA registers
613 * @param e1000 E1000 data structure
616 static void e1000_clear_multicast_receive_addresses(e1000_t
*e1000
)
618 unsigned int first_multicast_ra_num
=
619 E1000_RECEIVE_ADDRESS
- e1000
->multicast_ra_count
;
621 for (unsigned int ra_num
= E1000_RECEIVE_ADDRESS
- 1;
622 ra_num
>= first_multicast_ra_num
;
624 e1000_disable_receive_address(e1000
, ra_num
);
626 e1000
->multicast_ra_count
= 0;
629 /** Return receive address filter positions count usable for unicast
631 * @param e1000 E1000 data structure
633 * @return receive address filter positions count usable for unicast
636 static unsigned int get_free_unicast_address_count(e1000_t
*e1000
)
638 return E1000_RECEIVE_ADDRESS
- 1 - e1000
->multicast_ra_count
;
641 /** Return receive address filter positions count usable for multicast
643 * @param e1000 E1000 data structure
645 * @return receive address filter positions count usable for multicast
648 static unsigned int get_free_multicast_address_count(e1000_t
*e1000
)
650 return E1000_RECEIVE_ADDRESS
- 1 - e1000
->unicast_ra_count
;
653 /** Write unicast receive addresses to receive address filter registers
655 * @param e1000 E1000 data structure
656 * @param addr Pointer to address array
657 * @param addr_cnt Address array count
660 static void e1000_add_unicast_receive_addresses(e1000_t
*e1000
,
661 const nic_address_t
*addr
, size_t addr_cnt
)
663 assert(addr_cnt
<= get_free_unicast_address_count(e1000
));
665 nic_address_t
*addr_iterator
= (nic_address_t
*) addr
;
667 /* ra_num = 0 is primary address */
668 for (unsigned int ra_num
= 1;
671 e1000_write_receive_address(e1000
, ra_num
, addr_iterator
, true);
676 /** Write multicast receive addresses to receive address filter registers
678 * @param e1000 E1000 data structure
679 * @param addr Pointer to address array
680 * @param addr_cnt Address array count
683 static void e1000_add_multicast_receive_addresses(e1000_t
*e1000
,
684 const nic_address_t
*addr
, size_t addr_cnt
)
686 assert(addr_cnt
<= get_free_multicast_address_count(e1000
));
688 nic_address_t
*addr_iterator
= (nic_address_t
*) addr
;
690 unsigned int first_multicast_ra_num
= E1000_RECEIVE_ADDRESS
- addr_cnt
;
691 for (unsigned int ra_num
= E1000_RECEIVE_ADDRESS
- 1;
692 ra_num
>= first_multicast_ra_num
;
694 e1000_write_receive_address(e1000
, ra_num
, addr_iterator
, true);
699 /** Disable receiving frames for default address
701 * @param e1000 E1000 data structure
704 static void disable_ra0_address_filter(e1000_t
*e1000
)
706 uint32_t rah0
= E1000_REG_READ(e1000
, E1000_RAH_ARRAY(0));
707 rah0
= rah0
& ~RAH_AV
;
708 E1000_REG_WRITE(e1000
, E1000_RAH_ARRAY(0), rah0
);
711 /** Enable receiving frames for default address
713 * @param e1000 E1000 data structure
716 static void enable_ra0_address_filter(e1000_t
*e1000
)
718 uint32_t rah0
= E1000_REG_READ(e1000
, E1000_RAH_ARRAY(0));
719 rah0
= rah0
| RAH_AV
;
720 E1000_REG_WRITE(e1000
, E1000_RAH_ARRAY(0), rah0
);
723 /** Disable unicast promiscuous mode
725 * @param e1000 E1000 data structure
728 static void e1000_disable_unicast_promisc(e1000_t
*e1000
)
730 uint32_t rctl
= E1000_REG_READ(e1000
, E1000_RCTL
);
731 rctl
= rctl
& ~RCTL_UPE
;
732 E1000_REG_WRITE(e1000
, E1000_RCTL
, rctl
);
735 /** Enable unicast promiscuous mode
737 * @param e1000 E1000 data structure
740 static void e1000_enable_unicast_promisc(e1000_t
*e1000
)
742 uint32_t rctl
= E1000_REG_READ(e1000
, E1000_RCTL
);
743 rctl
= rctl
| RCTL_UPE
;
744 E1000_REG_WRITE(e1000
, E1000_RCTL
, rctl
);
747 /** Disable multicast promiscuous mode
749 * @param e1000 E1000 data structure
752 static void e1000_disable_multicast_promisc(e1000_t
*e1000
)
754 uint32_t rctl
= E1000_REG_READ(e1000
, E1000_RCTL
);
755 rctl
= rctl
& ~RCTL_MPE
;
756 E1000_REG_WRITE(e1000
, E1000_RCTL
, rctl
);
759 /** Enable multicast promiscuous mode
761 * @param e1000 E1000 data structure
764 static void e1000_enable_multicast_promisc(e1000_t
*e1000
)
766 uint32_t rctl
= E1000_REG_READ(e1000
, E1000_RCTL
);
767 rctl
= rctl
| RCTL_MPE
;
768 E1000_REG_WRITE(e1000
, E1000_RCTL
, rctl
);
771 /** Enable accepting of broadcast frames
773 * @param e1000 E1000 data structure
776 static void e1000_enable_broadcast_accept(e1000_t
*e1000
)
778 uint32_t rctl
= E1000_REG_READ(e1000
, E1000_RCTL
);
779 rctl
= rctl
| RCTL_BAM
;
780 E1000_REG_WRITE(e1000
, E1000_RCTL
, rctl
);
783 /** Disable accepting of broadcast frames
785 * @param e1000 E1000 data structure
788 static void e1000_disable_broadcast_accept(e1000_t
*e1000
)
790 uint32_t rctl
= E1000_REG_READ(e1000
, E1000_RCTL
);
791 rctl
= rctl
& ~RCTL_BAM
;
792 E1000_REG_WRITE(e1000
, E1000_RCTL
, rctl
);
795 /** Enable VLAN filtering according to VFTA registers
797 * @param e1000 E1000 data structure
800 static void e1000_enable_vlan_filter(e1000_t
*e1000
)
802 uint32_t rctl
= E1000_REG_READ(e1000
, E1000_RCTL
);
803 rctl
= rctl
| RCTL_VFE
;
804 E1000_REG_WRITE(e1000
, E1000_RCTL
, rctl
);
807 /** Disable VLAN filtering
809 * @param e1000 E1000 data structure
812 static void e1000_disable_vlan_filter(e1000_t
*e1000
)
814 uint32_t rctl
= E1000_REG_READ(e1000
, E1000_RCTL
);
815 rctl
= rctl
& ~RCTL_VFE
;
816 E1000_REG_WRITE(e1000
, E1000_RCTL
, rctl
);
819 /** Set multicast frames acceptance mode
821 * @param nic NIC device to update
822 * @param mode Mode to set
823 * @param addr Address list (used in mode = NIC_MULTICAST_LIST)
824 * @param addr_cnt Length of address list (used in mode = NIC_MULTICAST_LIST)
829 static errno_t
e1000_on_multicast_mode_change(nic_t
*nic
, nic_multicast_mode_t mode
,
830 const nic_address_t
*addr
, size_t addr_cnt
)
832 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
835 fibril_mutex_lock(&e1000
->rx_lock
);
838 case NIC_MULTICAST_BLOCKED
:
839 e1000_clear_multicast_receive_addresses(e1000
);
840 e1000_disable_multicast_promisc(e1000
);
841 nic_report_hw_filtering(nic
, -1, 1, -1);
843 case NIC_MULTICAST_LIST
:
844 e1000_clear_multicast_receive_addresses(e1000
);
845 if (addr_cnt
> get_free_multicast_address_count(e1000
)) {
847 * Future work: fill MTA table
848 * Not strictly neccessary, it only saves some compares
849 * in the NIC library.
851 e1000_enable_multicast_promisc(e1000
);
852 nic_report_hw_filtering(nic
, -1, 0, -1);
854 e1000_disable_multicast_promisc(e1000
);
855 e1000_add_multicast_receive_addresses(e1000
, addr
, addr_cnt
);
856 nic_report_hw_filtering(nic
, -1, 1, -1);
859 case NIC_MULTICAST_PROMISC
:
860 e1000_enable_multicast_promisc(e1000
);
861 e1000_clear_multicast_receive_addresses(e1000
);
862 nic_report_hw_filtering(nic
, -1, 1, -1);
869 fibril_mutex_unlock(&e1000
->rx_lock
);
873 /** Set unicast frames acceptance mode
875 * @param nic NIC device to update
876 * @param mode Mode to set
877 * @param addr Address list (used in mode = NIC_MULTICAST_LIST)
878 * @param addr_cnt Length of address list (used in mode = NIC_MULTICAST_LIST)
883 static errno_t
e1000_on_unicast_mode_change(nic_t
*nic
, nic_unicast_mode_t mode
,
884 const nic_address_t
*addr
, size_t addr_cnt
)
886 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
889 fibril_mutex_lock(&e1000
->rx_lock
);
892 case NIC_UNICAST_BLOCKED
:
893 disable_ra0_address_filter(e1000
);
894 e1000_clear_unicast_receive_addresses(e1000
);
895 e1000_disable_unicast_promisc(e1000
);
896 nic_report_hw_filtering(nic
, 1, -1, -1);
898 case NIC_UNICAST_DEFAULT
:
899 enable_ra0_address_filter(e1000
);
900 e1000_clear_unicast_receive_addresses(e1000
);
901 e1000_disable_unicast_promisc(e1000
);
902 nic_report_hw_filtering(nic
, 1, -1, -1);
904 case NIC_UNICAST_LIST
:
905 enable_ra0_address_filter(e1000
);
906 e1000_clear_unicast_receive_addresses(e1000
);
907 if (addr_cnt
> get_free_unicast_address_count(e1000
)) {
908 e1000_enable_unicast_promisc(e1000
);
909 nic_report_hw_filtering(nic
, 0, -1, -1);
911 e1000_disable_unicast_promisc(e1000
);
912 e1000_add_unicast_receive_addresses(e1000
, addr
, addr_cnt
);
913 nic_report_hw_filtering(nic
, 1, -1, -1);
916 case NIC_UNICAST_PROMISC
:
917 e1000_enable_unicast_promisc(e1000
);
918 enable_ra0_address_filter(e1000
);
919 e1000_clear_unicast_receive_addresses(e1000
);
920 nic_report_hw_filtering(nic
, 1, -1, -1);
927 fibril_mutex_unlock(&e1000
->rx_lock
);
931 /** Set broadcast frames acceptance mode
933 * @param nic NIC device to update
934 * @param mode Mode to set
939 static errno_t
e1000_on_broadcast_mode_change(nic_t
*nic
, nic_broadcast_mode_t mode
)
941 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
944 fibril_mutex_lock(&e1000
->rx_lock
);
947 case NIC_BROADCAST_BLOCKED
:
948 e1000_disable_broadcast_accept(e1000
);
950 case NIC_BROADCAST_ACCEPTED
:
951 e1000_enable_broadcast_accept(e1000
);
958 fibril_mutex_unlock(&e1000
->rx_lock
);
962 /** Check if receiving is enabled
964 * @param e1000 E1000 data structure
966 * @return true if receiving is enabled
969 static bool e1000_is_rx_enabled(e1000_t
*e1000
)
971 if (E1000_REG_READ(e1000
, E1000_RCTL
) & (RCTL_EN
))
979 * @param e1000 E1000 data structure
982 static void e1000_enable_rx(e1000_t
*e1000
)
984 /* Set Receive Enable Bit */
985 E1000_REG_WRITE(e1000
, E1000_RCTL
,
986 E1000_REG_READ(e1000
, E1000_RCTL
) | (RCTL_EN
));
989 /** Disable receiving
991 * @param e1000 E1000 data structure
994 static void e1000_disable_rx(e1000_t
*e1000
)
996 /* Clear Receive Enable Bit */
997 E1000_REG_WRITE(e1000
, E1000_RCTL
,
998 E1000_REG_READ(e1000
, E1000_RCTL
) & ~(RCTL_EN
));
1003 * @param nic NIC device to update
1004 * @param vlan_mask VLAN mask
1007 static void e1000_on_vlan_mask_change(nic_t
*nic
,
1008 const nic_vlan_mask_t
*vlan_mask
)
1010 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
1012 fibril_mutex_lock(&e1000
->rx_lock
);
1016 * Disable receiving, so that frame matching
1017 * partially written VLAN is not received.
1019 bool rx_enabled
= e1000_is_rx_enabled(e1000
);
1021 e1000_disable_rx(e1000
);
1023 for (unsigned int i
= 0; i
< NIC_VLAN_BITMAP_SIZE
; i
+= 4) {
1024 uint32_t bitmap_part
=
1025 ((uint32_t) vlan_mask
->bitmap
[i
]) |
1026 (((uint32_t) vlan_mask
->bitmap
[i
+ 1]) << 8) |
1027 (((uint32_t) vlan_mask
->bitmap
[i
+ 2]) << 16) |
1028 (((uint32_t) vlan_mask
->bitmap
[i
+ 3]) << 24);
1029 E1000_REG_WRITE(e1000
, E1000_VFTA_ARRAY(i
/ 4), bitmap_part
);
1032 e1000_enable_vlan_filter(e1000
);
1034 e1000_enable_rx(e1000
);
1036 e1000_disable_vlan_filter(e1000
);
1038 fibril_mutex_unlock(&e1000
->rx_lock
);
1043 * @param device E1000 device
1044 * @param tag VLAN tag
1050 static errno_t
e1000_vlan_set_tag(ddf_fun_t
*fun
, uint16_t tag
, bool add
,
1053 /* VLAN CFI bit cannot be set */
1054 if (tag
& VLANTAG_CFI
)
1058 * CTRL.VME is neccessary for both strip and add
1059 * but CTRL.VME means stripping tags on receive.
1064 e1000_t
*e1000
= DRIVER_DATA_FUN(fun
);
1066 e1000
->vlan_tag
= tag
;
1067 e1000
->vlan_tag_add
= add
;
1069 fibril_mutex_lock(&e1000
->ctrl_lock
);
1071 uint32_t ctrl
= E1000_REG_READ(e1000
, E1000_CTRL
);
1077 E1000_REG_WRITE(e1000
, E1000_CTRL
, ctrl
);
1079 fibril_mutex_unlock(&e1000
->ctrl_lock
);
1083 /** Fill receive descriptor with new empty buffer
1085 * Store frame in e1000->rx_frame_phys
1087 * @param nic NIC data stricture
1088 * @param offset Receive descriptor offset
1091 static void e1000_fill_new_rx_descriptor(nic_t
*nic
, size_t offset
)
1093 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
1095 e1000_rx_descriptor_t
*rx_descriptor
= (e1000_rx_descriptor_t
*)
1096 (e1000
->rx_ring_virt
+ offset
* sizeof(e1000_rx_descriptor_t
));
1098 rx_descriptor
->phys_addr
= PTR_TO_U64(e1000
->rx_frame_phys
[offset
]);
1099 rx_descriptor
->length
= 0;
1100 rx_descriptor
->checksum
= 0;
1101 rx_descriptor
->status
= 0;
1102 rx_descriptor
->errors
= 0;
1103 rx_descriptor
->special
= 0;
1106 /** Clear receive descriptor
1108 * @param e1000 E1000 data
1109 * @param offset Receive descriptor offset
1112 static void e1000_clear_rx_descriptor(e1000_t
*e1000
, unsigned int offset
)
1114 e1000_rx_descriptor_t
*rx_descriptor
= (e1000_rx_descriptor_t
*)
1115 (e1000
->rx_ring_virt
+ offset
* sizeof(e1000_rx_descriptor_t
));
1117 rx_descriptor
->length
= 0;
1118 rx_descriptor
->checksum
= 0;
1119 rx_descriptor
->status
= 0;
1120 rx_descriptor
->errors
= 0;
1121 rx_descriptor
->special
= 0;
1124 /** Clear receive descriptor
1126 * @param nic NIC data
1127 * @param offset Receive descriptor offset
1130 static void e1000_clear_tx_descriptor(nic_t
*nic
, unsigned int offset
)
1132 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
1134 e1000_tx_descriptor_t
*tx_descriptor
= (e1000_tx_descriptor_t
*)
1135 (e1000
->tx_ring_virt
+ offset
* sizeof(e1000_tx_descriptor_t
));
1137 tx_descriptor
->phys_addr
= 0;
1138 tx_descriptor
->length
= 0;
1139 tx_descriptor
->checksum_offset
= 0;
1140 tx_descriptor
->command
= 0;
1141 tx_descriptor
->status
= 0;
1142 tx_descriptor
->checksum_start_field
= 0;
1143 tx_descriptor
->special
= 0;
1146 /** Increment tail pointer for receive or transmit ring
1148 * @param tail Old Tail
1149 * @param descriptors_count Ring length
1154 static uint32_t e1000_inc_tail(uint32_t tail
, uint32_t descriptors_count
)
1156 if (tail
+ 1 == descriptors_count
)
1164 * @param nic NIC data
1167 static void e1000_receive_frames(nic_t
*nic
)
1169 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
1171 fibril_mutex_lock(&e1000
->rx_lock
);
1173 uint32_t *tail_addr
= E1000_REG_ADDR(e1000
, E1000_RDT
);
1174 uint32_t next_tail
= e1000_inc_tail(*tail_addr
, E1000_RX_FRAME_COUNT
);
1176 e1000_rx_descriptor_t
*rx_descriptor
= (e1000_rx_descriptor_t
*)
1177 (e1000
->rx_ring_virt
+ next_tail
* sizeof(e1000_rx_descriptor_t
));
1179 while (rx_descriptor
->status
& 0x01) {
1180 uint32_t frame_size
= rx_descriptor
->length
- E1000_CRC_SIZE
;
1182 nic_frame_t
*frame
= nic_alloc_frame(nic
, frame_size
);
1183 if (frame
!= NULL
) {
1184 memcpy(frame
->data
, e1000
->rx_frame_virt
[next_tail
], frame_size
);
1185 nic_received_frame(nic
, frame
);
1187 ddf_msg(LVL_ERROR
, "Memory allocation failed. Frame dropped.");
1190 e1000_fill_new_rx_descriptor(nic
, next_tail
);
1192 *tail_addr
= e1000_inc_tail(*tail_addr
, E1000_RX_FRAME_COUNT
);
1193 next_tail
= e1000_inc_tail(*tail_addr
, E1000_RX_FRAME_COUNT
);
1195 rx_descriptor
= (e1000_rx_descriptor_t
*)
1196 (e1000
->rx_ring_virt
+ next_tail
* sizeof(e1000_rx_descriptor_t
));
1199 fibril_mutex_unlock(&e1000
->rx_lock
);
1202 /** Enable E1000 interupts
1204 * @param e1000 E1000 data structure
1207 static void e1000_enable_interrupts(e1000_t
*e1000
)
1209 E1000_REG_WRITE(e1000
, E1000_IMS
, ICR_RXT0
);
1212 /** Disable E1000 interupts
1214 * @param e1000 E1000 data structure
1217 static void e1000_disable_interrupts(e1000_t
*e1000
)
1219 E1000_REG_WRITE(e1000
, E1000_IMS
, 0);
1222 /** Interrupt handler implementation
1224 * This function is called from e1000_interrupt_handler()
1227 * @param nic NIC data
1228 * @param icr ICR register value
1231 static void e1000_interrupt_handler_impl(nic_t
*nic
, uint32_t icr
)
1234 e1000_receive_frames(nic
);
1237 /** Handle device interrupt
1239 * @param icall IPC call structure
1240 * @param dev E1000 device
1243 static void e1000_interrupt_handler(ipc_call_t
*icall
,
1246 uint32_t icr
= (uint32_t) IPC_GET_ARG2(*icall
);
1247 nic_t
*nic
= NIC_DATA_DEV(dev
);
1248 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
1250 e1000_interrupt_handler_impl(nic
, icr
);
1251 e1000_enable_interrupts(e1000
);
1254 /** Register interrupt handler for the card in the system
1256 * Note: The global irq_reg_mutex is locked because of work with global
1259 * @param nic Driver data
1261 * @param[out] handle IRQ capability handle if the handler was registered
1263 * @return An error code otherwise
1266 inline static errno_t
e1000_register_int_handler(nic_t
*nic
,
1267 cap_irq_handle_t
*handle
)
1269 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
1271 /* Lock the mutex in whole driver while working with global structure */
1272 fibril_mutex_lock(&irq_reg_mutex
);
1274 e1000_irq_code
.ranges
[0].base
= (uintptr_t) e1000
->reg_base_phys
;
1275 e1000_irq_code
.cmds
[0].addr
= e1000
->reg_base_phys
+ E1000_ICR
;
1276 e1000_irq_code
.cmds
[2].addr
= e1000
->reg_base_phys
+ E1000_IMC
;
1278 errno_t rc
= register_interrupt_handler(nic_get_ddf_dev(nic
), e1000
->irq
,
1279 e1000_interrupt_handler
, &e1000_irq_code
, handle
);
1281 fibril_mutex_unlock(&irq_reg_mutex
);
1285 /** Force receiving all frames in the receive buffer
1287 * @param nic NIC data
1290 static void e1000_poll(nic_t
*nic
)
1294 e1000_t
*e1000
= nic_get_specific(nic
);
1297 uint32_t icr
= E1000_REG_READ(e1000
, E1000_ICR
);
1298 e1000_interrupt_handler_impl(nic
, icr
);
1301 /** Calculates ITR register interrupt from timeval structure
1303 * @param period Period
1306 static uint16_t e1000_calculate_itr_interval(const struct timeval
*period
)
1308 // TODO: use also tv_sec
1309 return e1000_calculate_itr_interval_from_usecs(period
->tv_usec
);
1312 /** Set polling mode
1314 * @param device Device to set
1315 * @param mode Mode to set
1316 * @param period Period for NIC_POLL_PERIODIC
1318 * @return EOK if succeed
1319 * @return ENOTSUP if the mode is not supported
1322 static errno_t
e1000_poll_mode_change(nic_t
*nic
, nic_poll_mode_t mode
,
1323 const struct timeval
*period
)
1327 e1000_t
*e1000
= nic_get_specific(nic
);
1331 case NIC_POLL_IMMEDIATE
:
1332 E1000_REG_WRITE(e1000
, E1000_ITR
, 0);
1333 e1000_enable_interrupts(e1000
);
1335 case NIC_POLL_ON_DEMAND
:
1336 e1000_disable_interrupts(e1000
);
1338 case NIC_POLL_PERIODIC
:
1340 uint16_t itr_interval
= e1000_calculate_itr_interval(period
);
1341 E1000_REG_WRITE(e1000
, E1000_ITR
, (uint32_t) itr_interval
);
1342 e1000_enable_interrupts(e1000
);
1351 /** Initialize receive registers
1353 * @param e1000 E1000 data structure
1356 static void e1000_initialize_rx_registers(e1000_t
*e1000
)
1358 E1000_REG_WRITE(e1000
, E1000_RDLEN
, E1000_RX_FRAME_COUNT
* 16);
1359 E1000_REG_WRITE(e1000
, E1000_RDH
, 0);
1361 /* It is not posible to let HW use all descriptors */
1362 E1000_REG_WRITE(e1000
, E1000_RDT
, E1000_RX_FRAME_COUNT
- 1);
1364 /* Set Broadcast Enable Bit */
1365 E1000_REG_WRITE(e1000
, E1000_RCTL
, RCTL_BAM
);
1368 /** Initialize receive structure
1370 * @param nic NIC data
1372 * @return EOK if succeed
1373 * @return An error code otherwise
1376 static errno_t
e1000_initialize_rx_structure(nic_t
*nic
)
1378 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
1379 fibril_mutex_lock(&e1000
->rx_lock
);
1381 e1000
->rx_ring_virt
= AS_AREA_ANY
;
1382 errno_t rc
= dmamem_map_anonymous(
1383 E1000_RX_FRAME_COUNT
* sizeof(e1000_rx_descriptor_t
),
1384 DMAMEM_4GiB
, AS_AREA_READ
| AS_AREA_WRITE
, 0,
1385 &e1000
->rx_ring_phys
, &e1000
->rx_ring_virt
);
1389 E1000_REG_WRITE(e1000
, E1000_RDBAH
,
1390 (uint32_t) (PTR_TO_U64(e1000
->rx_ring_phys
) >> 32));
1391 E1000_REG_WRITE(e1000
, E1000_RDBAL
,
1392 (uint32_t) PTR_TO_U64(e1000
->rx_ring_phys
));
1394 e1000
->rx_frame_phys
= (uintptr_t *)
1395 calloc(E1000_RX_FRAME_COUNT
, sizeof(uintptr_t));
1396 e1000
->rx_frame_virt
=
1397 calloc(E1000_RX_FRAME_COUNT
, sizeof(void *));
1398 if ((e1000
->rx_frame_phys
== NULL
) || (e1000
->rx_frame_virt
== NULL
)) {
1403 for (size_t i
= 0; i
< E1000_RX_FRAME_COUNT
; i
++) {
1404 uintptr_t frame_phys
;
1405 void *frame_virt
= AS_AREA_ANY
;
1407 rc
= dmamem_map_anonymous(E1000_MAX_SEND_FRAME_SIZE
,
1408 DMAMEM_4GiB
, AS_AREA_READ
| AS_AREA_WRITE
, 0,
1409 &frame_phys
, &frame_virt
);
1413 e1000
->rx_frame_phys
[i
] = frame_phys
;
1414 e1000
->rx_frame_virt
[i
] = frame_virt
;
1417 /* Write descriptor */
1418 for (size_t i
= 0; i
< E1000_RX_FRAME_COUNT
; i
++)
1419 e1000_fill_new_rx_descriptor(nic
, i
);
1421 e1000_initialize_rx_registers(e1000
);
1423 fibril_mutex_unlock(&e1000
->rx_lock
);
1427 for (size_t i
= 0; i
< E1000_RX_FRAME_COUNT
; i
++) {
1428 if (e1000
->rx_frame_virt
[i
] != NULL
) {
1429 dmamem_unmap_anonymous(e1000
->rx_frame_virt
[i
]);
1430 e1000
->rx_frame_phys
[i
] = 0;
1431 e1000
->rx_frame_virt
[i
] = NULL
;
1435 if (e1000
->rx_frame_phys
!= NULL
) {
1436 free(e1000
->rx_frame_phys
);
1437 e1000
->rx_frame_phys
= NULL
;
1440 if (e1000
->rx_frame_virt
!= NULL
) {
1441 free(e1000
->rx_frame_virt
);
1442 e1000
->rx_frame_virt
= NULL
;
1448 /** Uninitialize receive structure
1450 * @param nic NIC data
1453 static void e1000_uninitialize_rx_structure(nic_t
*nic
)
1455 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
1457 /* Write descriptor */
1458 for (unsigned int offset
= 0; offset
< E1000_RX_FRAME_COUNT
; offset
++) {
1459 dmamem_unmap_anonymous(e1000
->rx_frame_virt
[offset
]);
1460 e1000
->rx_frame_phys
[offset
] = 0;
1461 e1000
->rx_frame_virt
[offset
] = NULL
;
1464 free(e1000
->rx_frame_virt
);
1466 e1000
->rx_frame_phys
= NULL
;
1467 e1000
->rx_frame_virt
= NULL
;
1469 dmamem_unmap_anonymous(e1000
->rx_ring_virt
);
1472 /** Clear receive descriptor ring
1474 * @param e1000 E1000 data
1477 static void e1000_clear_rx_ring(e1000_t
*e1000
)
1479 /* Write descriptor */
1480 for (unsigned int offset
= 0;
1481 offset
< E1000_RX_FRAME_COUNT
;
1483 e1000_clear_rx_descriptor(e1000
, offset
);
1486 /** Initialize filters
1488 * @param e1000 E1000 data
1491 static void e1000_initialize_filters(e1000_t
*e1000
)
1493 /* Initialize address filter */
1494 e1000
->unicast_ra_count
= 0;
1495 e1000
->multicast_ra_count
= 0;
1496 e1000_clear_unicast_receive_addresses(e1000
);
1501 * @param e1000 E1000 data
1504 static void e1000_initialize_vlan(e1000_t
*e1000
)
1506 e1000
->vlan_tag_add
= false;
1509 /** Fill MAC address from EEPROM to RA[0] register
1511 * @param e1000 E1000 data
1514 static void e1000_fill_mac_from_eeprom(e1000_t
*e1000
)
1516 /* MAC address from eeprom to RA[0] */
1517 nic_address_t address
;
1518 e1000_eeprom_get_address(e1000
, &address
);
1519 e1000_write_receive_address(e1000
, 0, &address
, true);
1522 /** Initialize other registers
1524 * @param dev E1000 data.
1526 * @return EOK if succeed
1527 * @return An error code otherwise
1530 static void e1000_initialize_registers(e1000_t
*e1000
)
1532 E1000_REG_WRITE(e1000
, E1000_ITR
,
1533 e1000_calculate_itr_interval_from_usecs(
1534 E1000_DEFAULT_INTERRUPT_INTERVAL_USEC
));
1535 E1000_REG_WRITE(e1000
, E1000_FCAH
, 0);
1536 E1000_REG_WRITE(e1000
, E1000_FCAL
, 0);
1537 E1000_REG_WRITE(e1000
, E1000_FCT
, 0);
1538 E1000_REG_WRITE(e1000
, E1000_FCTTV
, 0);
1539 E1000_REG_WRITE(e1000
, E1000_VET
, VET_VALUE
);
1540 E1000_REG_WRITE(e1000
, E1000_CTRL
, CTRL_ASDE
);
1543 /** Initialize transmit registers
1545 * @param e1000 E1000 data.
1548 static void e1000_initialize_tx_registers(e1000_t
*e1000
)
1550 E1000_REG_WRITE(e1000
, E1000_TDLEN
, E1000_TX_FRAME_COUNT
* 16);
1551 E1000_REG_WRITE(e1000
, E1000_TDH
, 0);
1552 E1000_REG_WRITE(e1000
, E1000_TDT
, 0);
1554 E1000_REG_WRITE(e1000
, E1000_TIPG
,
1555 10 << TIPG_IPGT_SHIFT
|
1556 8 << TIPG_IPGR1_SHIFT
|
1557 6 << TIPG_IPGR2_SHIFT
);
1559 E1000_REG_WRITE(e1000
, E1000_TCTL
,
1560 0x0F << TCTL_CT_SHIFT
/* Collision Threshold */ |
1561 0x40 << TCTL_COLD_SHIFT
/* Collision Distance */ |
1562 TCTL_PSP
/* Pad Short Packets */);
1565 /** Initialize transmit structure
1567 * @param e1000 E1000 data.
1570 static errno_t
e1000_initialize_tx_structure(e1000_t
*e1000
)
1574 fibril_mutex_lock(&e1000
->tx_lock
);
1576 e1000
->tx_ring_phys
= 0;
1577 e1000
->tx_ring_virt
= AS_AREA_ANY
;
1579 e1000
->tx_frame_phys
= NULL
;
1580 e1000
->tx_frame_virt
= NULL
;
1582 errno_t rc
= dmamem_map_anonymous(
1583 E1000_TX_FRAME_COUNT
* sizeof(e1000_tx_descriptor_t
),
1584 DMAMEM_4GiB
, AS_AREA_READ
| AS_AREA_WRITE
, 0,
1585 &e1000
->tx_ring_phys
, &e1000
->tx_ring_virt
);
1589 memset(e1000
->tx_ring_virt
, 0,
1590 E1000_TX_FRAME_COUNT
* sizeof(e1000_tx_descriptor_t
));
1592 e1000
->tx_frame_phys
= (uintptr_t *)
1593 calloc(E1000_TX_FRAME_COUNT
, sizeof(uintptr_t));
1594 e1000
->tx_frame_virt
=
1595 calloc(E1000_TX_FRAME_COUNT
, sizeof(void *));
1597 if ((e1000
->tx_frame_phys
== NULL
) || (e1000
->tx_frame_virt
== NULL
)) {
1602 for (i
= 0; i
< E1000_TX_FRAME_COUNT
; i
++) {
1603 e1000
->tx_frame_virt
[i
] = AS_AREA_ANY
;
1604 rc
= dmamem_map_anonymous(E1000_MAX_SEND_FRAME_SIZE
,
1605 DMAMEM_4GiB
, AS_AREA_READ
| AS_AREA_WRITE
,
1606 0, &e1000
->tx_frame_phys
[i
], &e1000
->tx_frame_virt
[i
]);
1611 E1000_REG_WRITE(e1000
, E1000_TDBAH
,
1612 (uint32_t) (PTR_TO_U64(e1000
->tx_ring_phys
) >> 32));
1613 E1000_REG_WRITE(e1000
, E1000_TDBAL
,
1614 (uint32_t) PTR_TO_U64(e1000
->tx_ring_phys
));
1616 e1000_initialize_tx_registers(e1000
);
1618 fibril_mutex_unlock(&e1000
->tx_lock
);
1622 if (e1000
->tx_ring_virt
!= NULL
) {
1623 dmamem_unmap_anonymous(e1000
->tx_ring_virt
);
1624 e1000
->tx_ring_virt
= NULL
;
1627 if ((e1000
->tx_frame_phys
!= NULL
) && (e1000
->tx_frame_virt
!= NULL
)) {
1628 for (i
= 0; i
< E1000_TX_FRAME_COUNT
; i
++) {
1629 if (e1000
->tx_frame_virt
[i
] != NULL
) {
1630 dmamem_unmap_anonymous(e1000
->tx_frame_virt
[i
]);
1631 e1000
->tx_frame_phys
[i
] = 0;
1632 e1000
->tx_frame_virt
[i
] = NULL
;
1637 if (e1000
->tx_frame_phys
!= NULL
) {
1638 free(e1000
->tx_frame_phys
);
1639 e1000
->tx_frame_phys
= NULL
;
1642 if (e1000
->tx_frame_virt
!= NULL
) {
1643 free(e1000
->tx_frame_virt
);
1644 e1000
->tx_frame_virt
= NULL
;
1650 /** Uninitialize transmit structure
1652 * @param nic NIC data
1655 static void e1000_uninitialize_tx_structure(e1000_t
*e1000
)
1659 for (i
= 0; i
< E1000_TX_FRAME_COUNT
; i
++) {
1660 dmamem_unmap_anonymous(e1000
->tx_frame_virt
[i
]);
1661 e1000
->tx_frame_phys
[i
] = 0;
1662 e1000
->tx_frame_virt
[i
] = NULL
;
1665 if (e1000
->tx_frame_phys
!= NULL
) {
1666 free(e1000
->tx_frame_phys
);
1667 e1000
->tx_frame_phys
= NULL
;
1670 if (e1000
->tx_frame_virt
!= NULL
) {
1671 free(e1000
->tx_frame_virt
);
1672 e1000
->tx_frame_virt
= NULL
;
1675 dmamem_unmap_anonymous(e1000
->tx_ring_virt
);
1678 /** Clear transmit descriptor ring
1680 * @param nic NIC data
1683 static void e1000_clear_tx_ring(nic_t
*nic
)
1685 /* Write descriptor */
1686 for (unsigned int offset
= 0;
1687 offset
< E1000_TX_FRAME_COUNT
;
1689 e1000_clear_tx_descriptor(nic
, offset
);
1694 * @param e1000 E1000 data
1697 static void e1000_enable_tx(e1000_t
*e1000
)
1699 /* Set Transmit Enable Bit */
1700 E1000_REG_WRITE(e1000
, E1000_TCTL
,
1701 E1000_REG_READ(e1000
, E1000_TCTL
) | (TCTL_EN
));
1704 /** Disable transmit
1706 * @param e1000 E1000 data
1709 static void e1000_disable_tx(e1000_t
*e1000
)
1711 /* Clear Transmit Enable Bit */
1712 E1000_REG_WRITE(e1000
, E1000_TCTL
,
1713 E1000_REG_READ(e1000
, E1000_TCTL
) & ~(TCTL_EN
));
1716 /** Reset E1000 device
1718 * @param e1000 The E1000 data
1721 static errno_t
e1000_reset(nic_t
*nic
)
1723 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
1725 E1000_REG_WRITE(e1000
, E1000_CTRL
, CTRL_RST
);
1727 /* Wait for the reset */
1730 /* check if RST_BIT cleared */
1731 if (E1000_REG_READ(e1000
, E1000_CTRL
) & (CTRL_RST
))
1734 e1000_initialize_registers(e1000
);
1735 e1000_initialize_rx_registers(e1000
);
1736 e1000_initialize_tx_registers(e1000
);
1737 e1000_fill_mac_from_eeprom(e1000
);
1738 e1000_initialize_filters(e1000
);
1739 e1000_initialize_vlan(e1000
);
1744 /** Activate the device to receive and transmit frames
1746 * @param nic NIC driver data
1748 * @return EOK if activated successfully
1749 * @return Error code otherwise
1752 static errno_t
e1000_on_activating(nic_t
*nic
)
1756 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
1758 fibril_mutex_lock(&e1000
->rx_lock
);
1759 fibril_mutex_lock(&e1000
->tx_lock
);
1760 fibril_mutex_lock(&e1000
->ctrl_lock
);
1762 e1000_enable_interrupts(e1000
);
1764 errno_t rc
= hw_res_enable_interrupt(e1000
->parent_sess
, e1000
->irq
);
1766 e1000_disable_interrupts(e1000
);
1767 fibril_mutex_unlock(&e1000
->ctrl_lock
);
1768 fibril_mutex_unlock(&e1000
->tx_lock
);
1769 fibril_mutex_unlock(&e1000
->rx_lock
);
1773 e1000_clear_rx_ring(e1000
);
1774 e1000_enable_rx(e1000
);
1776 e1000_clear_tx_ring(nic
);
1777 e1000_enable_tx(e1000
);
1779 uint32_t ctrl
= E1000_REG_READ(e1000
, E1000_CTRL
);
1781 E1000_REG_WRITE(e1000
, E1000_CTRL
, ctrl
);
1783 fibril_mutex_unlock(&e1000
->ctrl_lock
);
1784 fibril_mutex_unlock(&e1000
->tx_lock
);
1785 fibril_mutex_unlock(&e1000
->rx_lock
);
1790 /** Callback for NIC_STATE_DOWN change
1792 * @param nic NIC driver data
1794 * @return EOK if succeed
1795 * @return Error code otherwise
1798 static errno_t
e1000_on_down_unlocked(nic_t
*nic
)
1800 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
1802 uint32_t ctrl
= E1000_REG_READ(e1000
, E1000_CTRL
);
1804 E1000_REG_WRITE(e1000
, E1000_CTRL
, ctrl
);
1806 e1000_disable_tx(e1000
);
1807 e1000_disable_rx(e1000
);
1809 hw_res_disable_interrupt(e1000
->parent_sess
, e1000
->irq
);
1810 e1000_disable_interrupts(e1000
);
1813 * Wait for the for the end of all data
1814 * transfers to descriptors.
1821 /** Callback for NIC_STATE_DOWN change
1823 * @param nic NIC driver data
1825 * @return EOK if succeed
1826 * @return Error code otherwise
1829 static errno_t
e1000_on_down(nic_t
*nic
)
1831 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
1833 fibril_mutex_lock(&e1000
->rx_lock
);
1834 fibril_mutex_lock(&e1000
->tx_lock
);
1835 fibril_mutex_lock(&e1000
->ctrl_lock
);
1837 errno_t rc
= e1000_on_down_unlocked(nic
);
1839 fibril_mutex_unlock(&e1000
->ctrl_lock
);
1840 fibril_mutex_unlock(&e1000
->tx_lock
);
1841 fibril_mutex_unlock(&e1000
->rx_lock
);
1846 /** Callback for NIC_STATE_STOPPED change
1848 * @param nic NIC driver data
1850 * @return EOK if succeed
1851 * @return Error code otherwise
1854 static errno_t
e1000_on_stopping(nic_t
*nic
)
1856 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
1858 fibril_mutex_lock(&e1000
->rx_lock
);
1859 fibril_mutex_lock(&e1000
->tx_lock
);
1860 fibril_mutex_lock(&e1000
->ctrl_lock
);
1862 errno_t rc
= e1000_on_down_unlocked(nic
);
1864 rc
= e1000_reset(nic
);
1866 fibril_mutex_unlock(&e1000
->ctrl_lock
);
1867 fibril_mutex_unlock(&e1000
->tx_lock
);
1868 fibril_mutex_unlock(&e1000
->rx_lock
);
1873 /** Create driver data structure
1875 * @return Intialized device data structure or NULL
1878 static e1000_t
*e1000_create_dev_data(ddf_dev_t
*dev
)
1880 nic_t
*nic
= nic_create_and_bind(dev
);
1884 e1000_t
*e1000
= malloc(sizeof(e1000_t
));
1886 nic_unbind_and_destroy(dev
);
1890 memset(e1000
, 0, sizeof(e1000_t
));
1893 nic_set_specific(nic
, e1000
);
1894 nic_set_send_frame_handler(nic
, e1000_send_frame
);
1895 nic_set_state_change_handlers(nic
, e1000_on_activating
,
1896 e1000_on_down
, e1000_on_stopping
);
1897 nic_set_filtering_change_handlers(nic
,
1898 e1000_on_unicast_mode_change
, e1000_on_multicast_mode_change
,
1899 e1000_on_broadcast_mode_change
, NULL
, e1000_on_vlan_mask_change
);
1900 nic_set_poll_handlers(nic
, e1000_poll_mode_change
, e1000_poll
);
1902 fibril_mutex_initialize(&e1000
->ctrl_lock
);
1903 fibril_mutex_initialize(&e1000
->rx_lock
);
1904 fibril_mutex_initialize(&e1000
->tx_lock
);
1905 fibril_mutex_initialize(&e1000
->eeprom_lock
);
1910 /** Delete driver data structure
1912 * @param data E1000 device data structure
1915 inline static void e1000_delete_dev_data(ddf_dev_t
*dev
)
1919 if (ddf_dev_data_get(dev
) != NULL
)
1920 nic_unbind_and_destroy(dev
);
1923 /** Clean up the E1000 device structure.
1925 * @param dev Device structure.
1928 static void e1000_dev_cleanup(ddf_dev_t
*dev
)
1932 e1000_delete_dev_data(dev
);
1935 /** Fill the irq and io_addr part of device data structure
1937 * The hw_resources must be obtained before calling this function
1939 * @param dev Device structure
1940 * @param hw_resources Hardware resources obtained from the parent device
1942 * @return EOK if succeed
1943 * @return An error code otherwise
1946 static errno_t
e1000_fill_resource_info(ddf_dev_t
*dev
,
1947 const hw_res_list_parsed_t
*hw_resources
)
1949 e1000_t
*e1000
= DRIVER_DATA_DEV(dev
);
1951 if (hw_resources
->irqs
.count
!= 1)
1954 e1000
->irq
= hw_resources
->irqs
.irqs
[0];
1955 e1000
->reg_base_phys
=
1956 MEMADDR_TO_PTR(RNGABS(hw_resources
->mem_ranges
.ranges
[0]));
1961 /** Obtain information about hardware resources of the device
1963 * The device must be connected to the parent
1965 * @param dev Device structure
1967 * @return EOK if succeed
1968 * @return An error code otherwise
1971 static errno_t
e1000_get_resource_info(ddf_dev_t
*dev
)
1973 assert(dev
!= NULL
);
1974 assert(NIC_DATA_DEV(dev
) != NULL
);
1976 hw_res_list_parsed_t hw_res_parsed
;
1977 hw_res_list_parsed_init(&hw_res_parsed
);
1979 /* Get hw resources form parent driver */
1980 errno_t rc
= nic_get_resources(NIC_DATA_DEV(dev
), &hw_res_parsed
);
1984 /* Fill resources information to the device */
1985 rc
= e1000_fill_resource_info(dev
, &hw_res_parsed
);
1986 hw_res_list_parsed_clean(&hw_res_parsed
);
1991 /** Initialize the E1000 device structure
1993 * @param dev Device information
1995 * @return EOK if succeed
1996 * @return An error code otherwise
1999 static errno_t
e1000_device_initialize(ddf_dev_t
*dev
)
2001 /* Allocate driver data for the device. */
2002 e1000_t
*e1000
= e1000_create_dev_data(dev
);
2003 if (e1000
== NULL
) {
2004 ddf_msg(LVL_ERROR
, "Unable to allocate device softstate");
2008 e1000
->parent_sess
= ddf_dev_parent_sess_get(dev
);
2009 if (e1000
->parent_sess
== NULL
) {
2010 ddf_msg(LVL_ERROR
, "Failed connecting parent device.");
2014 /* Obtain and fill hardware resources info */
2015 errno_t rc
= e1000_get_resource_info(dev
);
2017 ddf_msg(LVL_ERROR
, "Cannot obtain hardware resources");
2018 e1000_dev_cleanup(dev
);
2023 rc
= pci_config_space_read_16(ddf_dev_parent_sess_get(dev
), PCI_DEVICE_ID
,
2026 ddf_msg(LVL_ERROR
, "Cannot access PCI configuration space");
2027 e1000_dev_cleanup(dev
);
2031 e1000_board_t board
;
2032 switch (device_id
) {
2037 board
= E1000_82540
;
2042 board
= E1000_82541
;
2047 board
= E1000_82541REV2
;
2054 board
= E1000_82545
;
2062 board
= E1000_82546
;
2066 board
= E1000_82547
;
2069 board
= E1000_82572
;
2072 board
= E1000_80003ES2
;
2075 ddf_msg(LVL_ERROR
, "Device not supported (%#" PRIx16
")",
2077 e1000_dev_cleanup(dev
);
2084 case E1000_82541REV2
:
2087 e1000
->info
.eerd_start
= 0x01;
2088 e1000
->info
.eerd_done
= 0x10;
2089 e1000
->info
.eerd_address_offset
= 8;
2090 e1000
->info
.eerd_data_offset
= 16;
2094 case E1000_80003ES2
:
2095 e1000
->info
.eerd_start
= 0x01;
2096 e1000
->info
.eerd_done
= 0x02;
2097 e1000
->info
.eerd_address_offset
= 2;
2098 e1000
->info
.eerd_data_offset
= 16;
2105 /** Enable the I/O ports of the device.
2107 * @param dev E1000 device.
2109 * @return EOK if successed
2110 * @return An error code otherwise
2113 static errno_t
e1000_pio_enable(ddf_dev_t
*dev
)
2115 e1000_t
*e1000
= DRIVER_DATA_DEV(dev
);
2117 errno_t rc
= pio_enable(e1000
->reg_base_phys
, 8 * PAGE_SIZE
,
2118 &e1000
->reg_base_virt
);
2120 return EADDRNOTAVAIL
;
2125 /** Probe and initialize the newly added device.
2127 * @param dev E1000 device.
2130 errno_t
e1000_dev_add(ddf_dev_t
*dev
)
2134 /* Initialize device structure for E1000 */
2135 errno_t rc
= e1000_device_initialize(dev
);
2139 /* Device initialization */
2140 nic_t
*nic
= ddf_dev_data_get(dev
);
2141 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
2144 rc
= e1000_pio_enable(dev
);
2148 e1000_initialize_registers(e1000
);
2149 rc
= e1000_initialize_tx_structure(e1000
);
2153 fibril_mutex_lock(&e1000
->rx_lock
);
2155 e1000_fill_mac_from_eeprom(e1000
);
2156 e1000_initialize_filters(e1000
);
2158 fibril_mutex_unlock(&e1000
->rx_lock
);
2160 e1000_initialize_vlan(e1000
);
2162 fun
= ddf_fun_create(nic_get_ddf_dev(nic
), fun_exposed
, "port0");
2164 goto err_tx_structure
;
2165 nic_set_ddf_fun(nic
, fun
);
2166 ddf_fun_set_ops(fun
, &e1000_dev_ops
);
2168 cap_irq_handle_t irq_handle
;
2169 rc
= e1000_register_int_handler(nic
, &irq_handle
);
2171 goto err_fun_create
;
2174 rc
= e1000_initialize_rx_structure(nic
);
2178 nic_address_t e1000_address
;
2179 e1000_get_address(e1000
, &e1000_address
);
2180 rc
= nic_report_address(nic
, &e1000_address
);
2182 goto err_rx_structure
;
2184 struct timeval period
;
2186 period
.tv_usec
= E1000_DEFAULT_INTERRUPT_INTERVAL_USEC
;
2187 rc
= nic_report_poll_mode(nic
, NIC_POLL_PERIODIC
, &period
);
2189 goto err_rx_structure
;
2191 rc
= ddf_fun_bind(fun
);
2195 rc
= ddf_fun_add_to_category(fun
, DEVICE_CATEGORY_NIC
);
2197 goto err_add_to_cat
;
2202 ddf_fun_unbind(fun
);
2205 e1000_uninitialize_rx_structure(nic
);
2207 unregister_interrupt_handler(dev
, irq_handle
);
2209 ddf_fun_destroy(fun
);
2210 nic_set_ddf_fun(nic
, NULL
);
2212 e1000_uninitialize_tx_structure(e1000
);
2214 // TODO: e1000_pio_disable(dev);
2216 e1000_dev_cleanup(dev
);
2220 /** Read 16-bit value from EEPROM of E1000 adapter
2222 * Read using the EERD register.
2224 * @param device E1000 device
2225 * @param eeprom_address 8-bit EEPROM address
2227 * @return 16-bit value from EEPROM
2230 static uint16_t e1000_eeprom_read(e1000_t
*e1000
, uint8_t eeprom_address
)
2232 fibril_mutex_lock(&e1000
->eeprom_lock
);
2234 /* Write address and START bit to EERD register */
2235 uint32_t write_data
= e1000
->info
.eerd_start
|
2236 (((uint32_t) eeprom_address
) <<
2237 e1000
->info
.eerd_address_offset
);
2238 E1000_REG_WRITE(e1000
, E1000_EERD
, write_data
);
2240 uint32_t eerd
= E1000_REG_READ(e1000
, E1000_EERD
);
2241 while ((eerd
& e1000
->info
.eerd_done
) == 0) {
2243 eerd
= E1000_REG_READ(e1000
, E1000_EERD
);
2246 fibril_mutex_unlock(&e1000
->eeprom_lock
);
2248 return (uint16_t) (eerd
>> e1000
->info
.eerd_data_offset
);
2251 /** Get MAC address of the E1000 adapter
2253 * @param device E1000 device
2254 * @param address Place to store the address
2255 * @param max_len Maximal addresss length to store
2257 * @return EOK if succeed
2258 * @return An error code otherwise
2261 static errno_t
e1000_get_address(e1000_t
*e1000
, nic_address_t
*address
)
2263 fibril_mutex_lock(&e1000
->rx_lock
);
2265 uint8_t *mac0_dest
= (uint8_t *) address
->address
;
2266 uint8_t *mac1_dest
= (uint8_t *) address
->address
+ 1;
2267 uint8_t *mac2_dest
= (uint8_t *) address
->address
+ 2;
2268 uint8_t *mac3_dest
= (uint8_t *) address
->address
+ 3;
2269 uint8_t *mac4_dest
= (uint8_t *) address
->address
+ 4;
2270 uint8_t *mac5_dest
= (uint8_t *) address
->address
+ 5;
2272 uint32_t rah
= E1000_REG_READ(e1000
, E1000_RAH_ARRAY(0));
2273 uint32_t ral
= E1000_REG_READ(e1000
, E1000_RAL_ARRAY(0));
2275 *mac0_dest
= (uint8_t) ral
;
2276 *mac1_dest
= (uint8_t) (ral
>> 8);
2277 *mac2_dest
= (uint8_t) (ral
>> 16);
2278 *mac3_dest
= (uint8_t) (ral
>> 24);
2279 *mac4_dest
= (uint8_t) rah
;
2280 *mac5_dest
= (uint8_t) (rah
>> 8);
2282 fibril_mutex_unlock(&e1000
->rx_lock
);
2286 /** Set card MAC address
2288 * @param device E1000 device
2289 * @param address Address
2291 * @return EOK if succeed
2292 * @return An error code otherwise
2294 static errno_t
e1000_set_addr(ddf_fun_t
*fun
, const nic_address_t
*addr
)
2296 nic_t
*nic
= NIC_DATA_FUN(fun
);
2297 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
2299 fibril_mutex_lock(&e1000
->rx_lock
);
2300 fibril_mutex_lock(&e1000
->tx_lock
);
2302 errno_t rc
= nic_report_address(nic
, addr
);
2304 e1000_write_receive_address(e1000
, 0, addr
, false);
2306 fibril_mutex_unlock(&e1000
->tx_lock
);
2307 fibril_mutex_unlock(&e1000
->rx_lock
);
2312 static void e1000_eeprom_get_address(e1000_t
*e1000
,
2313 nic_address_t
*address
)
2315 uint16_t *mac0_dest
= (uint16_t *) address
->address
;
2316 uint16_t *mac2_dest
= (uint16_t *) (address
->address
+ 2);
2317 uint16_t *mac4_dest
= (uint16_t *) (address
->address
+ 4);
2319 *mac0_dest
= e1000_eeprom_read(e1000
, 0);
2320 *mac2_dest
= e1000_eeprom_read(e1000
, 1);
2321 *mac4_dest
= e1000_eeprom_read(e1000
, 2);
2326 * @param nic NIC driver data structure
2327 * @param data Frame data
2328 * @param size Frame size in bytes
2330 * @return EOK if succeed
2331 * @return Error code in the case of error
2334 static void e1000_send_frame(nic_t
*nic
, void *data
, size_t size
)
2338 e1000_t
*e1000
= DRIVER_DATA_NIC(nic
);
2339 fibril_mutex_lock(&e1000
->tx_lock
);
2341 uint32_t tdt
= E1000_REG_READ(e1000
, E1000_TDT
);
2342 e1000_tx_descriptor_t
*tx_descriptor_addr
= (e1000_tx_descriptor_t
*)
2343 (e1000
->tx_ring_virt
+ tdt
* sizeof(e1000_tx_descriptor_t
));
2345 bool descriptor_available
= false;
2347 /* Descriptor never used */
2348 if (tx_descriptor_addr
->length
== 0)
2349 descriptor_available
= true;
2351 /* Descriptor done */
2352 if (tx_descriptor_addr
->status
& TXDESCRIPTOR_STATUS_DD
)
2353 descriptor_available
= true;
2355 if (!descriptor_available
) {
2357 fibril_mutex_unlock(&e1000
->tx_lock
);
2361 memcpy(e1000
->tx_frame_virt
[tdt
], data
, size
);
2363 tx_descriptor_addr
->phys_addr
= PTR_TO_U64(e1000
->tx_frame_phys
[tdt
]);
2364 tx_descriptor_addr
->length
= size
;
2367 * Report status to STATUS.DD (descriptor done),
2368 * add ethernet CRC, end of packet.
2370 tx_descriptor_addr
->command
= TXDESCRIPTOR_COMMAND_RS
|
2371 TXDESCRIPTOR_COMMAND_IFCS
|
2372 TXDESCRIPTOR_COMMAND_EOP
;
2374 tx_descriptor_addr
->checksum_offset
= 0;
2375 tx_descriptor_addr
->status
= 0;
2376 if (e1000
->vlan_tag_add
) {
2377 tx_descriptor_addr
->special
= e1000
->vlan_tag
;
2378 tx_descriptor_addr
->command
|= TXDESCRIPTOR_COMMAND_VLE
;
2380 tx_descriptor_addr
->special
= 0;
2382 tx_descriptor_addr
->checksum_start_field
= 0;
2385 if (tdt
== E1000_TX_FRAME_COUNT
)
2388 E1000_REG_WRITE(e1000
, E1000_TDT
, tdt
);
2390 fibril_mutex_unlock(&e1000
->tx_lock
);
2395 printf("%s: HelenOS E1000 network adapter driver\n", NAME
);
2397 if (nic_driver_init(NAME
) != EOK
)
2400 nic_driver_implement(&e1000_driver_ops
, &e1000_dev_ops
,
2404 return ddf_driver_main(&e1000_driver
);