Convert call-handling syscalls to capabilities
[helenos.git] / uspace / drv / bus / adb / cuda_adb / cuda_adb.c
blob765e0c80094671142bab1b200539dace4c9d397c
1 /*
2 * Copyright (c) 2010 Jiri Svoboda
3 * All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 /** @addtogroup genarch
30 * @{
32 /** @file VIA-CUDA Apple Desktop Bus driver
34 * Note: We should really do a full bus scan at the beginning and resolve
35 * address conflicts. Also we should consider the handler ID in r3. Instead
36 * we just assume a keyboard at address 2 or 8 and a mouse at address 9.
39 #include <assert.h>
40 #include <ddf/driver.h>
41 #include <ddf/log.h>
42 #include <ddi.h>
43 #include <errno.h>
44 #include <ipc/adb.h>
45 #include <libarch/ddi.h>
46 #include <stdbool.h>
47 #include <stddef.h>
48 #include <stdint.h>
49 #include <stdio.h>
50 #include <stdlib.h>
52 #include "cuda_adb.h"
53 #include "cuda_hw.h"
55 #define NAME "cuda_adb"
57 static void cuda_dev_connection(ipc_callid_t, ipc_call_t *, void *);
58 static int cuda_init(cuda_t *);
59 static void cuda_irq_handler(ipc_call_t *, void *);
61 static void cuda_irq_listen(cuda_t *);
62 static void cuda_irq_receive(cuda_t *);
63 static void cuda_irq_rcv_end(cuda_t *, void *, size_t *);
64 static void cuda_irq_send_start(cuda_t *);
65 static void cuda_irq_send(cuda_t *);
67 static void cuda_packet_handle(cuda_t *, uint8_t *, size_t);
68 static void cuda_send_start(cuda_t *);
69 static void cuda_autopoll_set(cuda_t *, bool);
71 static void adb_packet_handle(cuda_t *, uint8_t *, size_t, bool);
73 static irq_pio_range_t cuda_ranges[] = {
75 .base = 0,
76 .size = sizeof(cuda_regs_t)
80 static irq_cmd_t cuda_cmds[] = {
82 .cmd = CMD_PIO_READ_8,
83 .addr = NULL,
84 .dstarg = 1
87 .cmd = CMD_AND,
88 .value = SR_INT,
89 .srcarg = 1,
90 .dstarg = 2
93 .cmd = CMD_PREDICATE,
94 .value = 1,
95 .srcarg = 2
98 .cmd = CMD_ACCEPT
103 static irq_code_t cuda_irq_code = {
104 sizeof(cuda_ranges) / sizeof(irq_pio_range_t),
105 cuda_ranges,
106 sizeof(cuda_cmds) / sizeof(irq_cmd_t),
107 cuda_cmds
110 static int cuda_dev_create(cuda_t *cuda, const char *name, const char *id,
111 adb_dev_t **rdev)
113 adb_dev_t *dev = NULL;
114 ddf_fun_t *fun;
115 int rc;
117 fun = ddf_fun_create(cuda->dev, fun_inner, name);
118 if (fun == NULL) {
119 ddf_msg(LVL_ERROR, "Failed creating function '%s'.", name);
120 rc = ENOMEM;
121 goto error;
124 rc = ddf_fun_add_match_id(fun, id, 10);
125 if (rc != EOK) {
126 ddf_msg(LVL_ERROR, "Failed adding match ID.");
127 rc = ENOMEM;
128 goto error;
131 dev = ddf_fun_data_alloc(fun, sizeof(adb_dev_t));
132 if (dev == NULL) {
133 ddf_msg(LVL_ERROR, "Failed allocating memory for '%s'.", name);
134 rc = ENOMEM;
135 goto error;
138 dev->fun = fun;
139 list_append(&dev->lcuda, &cuda->devs);
141 ddf_fun_set_conn_handler(fun, cuda_dev_connection);
143 rc = ddf_fun_bind(fun);
144 if (rc != EOK) {
145 ddf_msg(LVL_ERROR, "Failed binding function '%s'.", name);
146 goto error;
149 *rdev = dev;
150 return EOK;
151 error:
152 if (fun != NULL)
153 ddf_fun_destroy(fun);
154 return rc;
157 int cuda_add(cuda_t *cuda, cuda_res_t *res)
159 adb_dev_t *kbd = NULL;
160 adb_dev_t *mouse = NULL;
161 int rc;
163 cuda->phys_base = res->base;
165 rc = cuda_dev_create(cuda, "kbd", "adb/keyboard", &kbd);
166 if (rc != EOK)
167 goto error;
169 rc = cuda_dev_create(cuda, "mouse", "adb/mouse", &mouse);
170 if (rc != EOK)
171 goto error;
173 cuda->addr_dev[2] = kbd;
174 cuda->addr_dev[8] = kbd;
176 cuda->addr_dev[9] = mouse;
178 rc = cuda_init(cuda);
179 if (rc != EOK) {
180 ddf_msg(LVL_ERROR, "Failed initializing CUDA hardware.");
181 return rc;
184 return EOK;
185 error:
186 return rc;
189 int cuda_remove(cuda_t *cuda)
191 return ENOTSUP;
194 int cuda_gone(cuda_t *cuda)
196 return ENOTSUP;
199 /** Device connection handler */
200 static void cuda_dev_connection(ipc_callid_t iid, ipc_call_t *icall, void *arg)
202 adb_dev_t *dev = (adb_dev_t *) ddf_fun_data_get((ddf_fun_t *) arg);
203 ipc_callid_t callid;
204 ipc_call_t call;
205 sysarg_t method;
207 /* Answer the IPC_M_CONNECT_ME_TO call. */
208 async_answer_0(iid, EOK);
210 while (true) {
211 callid = async_get_call(&call);
212 method = IPC_GET_IMETHOD(call);
214 if (!method) {
215 /* The other side has hung up. */
216 async_answer_0(callid, EOK);
217 return;
220 async_sess_t *sess =
221 async_callback_receive_start(EXCHANGE_SERIALIZE, &call);
222 if (sess != NULL) {
223 dev->client_sess = sess;
224 async_answer_0(callid, EOK);
225 } else {
226 async_answer_0(callid, EINVAL);
231 static int cuda_init(cuda_t *cuda)
233 int rc;
235 void *vaddr;
236 rc = pio_enable((void *) cuda->phys_base, sizeof(cuda_regs_t),
237 &vaddr);
238 if (rc != EOK)
239 return rc;
241 cuda->regs = vaddr;
242 cuda->xstate = cx_listen;
243 cuda->bidx = 0;
244 cuda->snd_bytes = 0;
246 fibril_mutex_initialize(&cuda->dev_lock);
248 /* Disable all interrupts from CUDA. */
249 pio_write_8(&cuda->regs->ier, IER_CLR | ALL_INT);
251 cuda_irq_code.ranges[0].base = (uintptr_t) cuda->phys_base;
252 cuda_irq_code.cmds[0].addr = (void *) &((cuda_regs_t *)
253 cuda->phys_base)->ifr;
254 async_irq_subscribe(10, cuda_irq_handler, cuda, &cuda_irq_code);
256 /* Enable SR interrupt. */
257 pio_write_8(&cuda->regs->ier, TIP | TREQ);
258 pio_write_8(&cuda->regs->ier, IER_SET | SR_INT);
260 /* Enable ADB autopolling. */
261 cuda_autopoll_set(cuda, true);
263 return EOK;
266 static void cuda_irq_handler(ipc_call_t *call, void *arg)
268 uint8_t rbuf[CUDA_RCV_BUF_SIZE];
269 cuda_t *cuda = (cuda_t *)arg;
270 size_t len;
271 bool handle;
273 handle = false;
274 len = 0;
276 fibril_mutex_lock(&cuda->dev_lock);
278 switch (cuda->xstate) {
279 case cx_listen:
280 cuda_irq_listen(cuda);
281 break;
282 case cx_receive:
283 cuda_irq_receive(cuda);
284 break;
285 case cx_rcv_end:
286 cuda_irq_rcv_end(cuda, rbuf, &len);
287 handle = true;
288 break;
289 case cx_send_start:
290 cuda_irq_send_start(cuda);
291 break;
292 case cx_send:
293 cuda_irq_send(cuda);
294 break;
297 /* Lower IFR.SR_INT so that CUDA can generate next int by raising it. */
298 pio_write_8(&cuda->regs->ifr, SR_INT);
300 fibril_mutex_unlock(&cuda->dev_lock);
302 /* Handle an incoming packet. */
303 if (handle)
304 cuda_packet_handle(cuda, rbuf, len);
307 /** Interrupt in listen state.
309 * Start packet reception.
311 * @param cuda CUDA instance
313 static void cuda_irq_listen(cuda_t *cuda)
315 uint8_t b = pio_read_8(&cuda->regs->b);
317 if ((b & TREQ) != 0) {
318 ddf_msg(LVL_WARN, "cuda_irq_listen: no TREQ?!");
319 return;
322 pio_write_8(&cuda->regs->b, b & ~TIP);
323 cuda->xstate = cx_receive;
326 /** Interrupt in receive state.
328 * Receive next byte of packet.
330 * @param cuda CUDA instance
332 static void cuda_irq_receive(cuda_t *cuda)
334 uint8_t data = pio_read_8(&cuda->regs->sr);
335 if (cuda->bidx < CUDA_RCV_BUF_SIZE)
336 cuda->rcv_buf[cuda->bidx++] = data;
338 uint8_t b = pio_read_8(&cuda->regs->b);
340 if ((b & TREQ) == 0) {
341 pio_write_8(&cuda->regs->b, b ^ TACK);
342 } else {
343 pio_write_8(&cuda->regs->b, b | TACK | TIP);
344 cuda->xstate = cx_rcv_end;
348 /** Interrupt in rcv_end state.
350 * Terminate packet reception. Either go back to listen state or start
351 * receiving another packet if CUDA has one for us.
353 * @param cuda CUDA instance
354 * @param buf Buffer for storing received packet
355 * @param len Place to store length of received packet
357 static void cuda_irq_rcv_end(cuda_t *cuda, void *buf, size_t *len)
359 uint8_t b = pio_read_8(&cuda->regs->b);
361 if ((b & TREQ) == 0) {
362 cuda->xstate = cx_receive;
363 pio_write_8(&cuda->regs->b, b & ~TIP);
364 } else {
365 cuda->xstate = cx_listen;
366 cuda_send_start(cuda);
369 memcpy(buf, cuda->rcv_buf, cuda->bidx);
370 *len = cuda->bidx;
371 cuda->bidx = 0;
374 /** Interrupt in send_start state.
376 * Process result of sending first byte (and send second on success).
378 * @param cuda CUDA instance
380 static void cuda_irq_send_start(cuda_t *cuda)
382 uint8_t b;
384 b = pio_read_8(&cuda->regs->b);
386 if ((b & TREQ) == 0) {
387 /* Collision */
388 pio_write_8(&cuda->regs->acr, pio_read_8(&cuda->regs->acr) &
389 ~SR_OUT);
390 pio_read_8(&cuda->regs->sr);
391 pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) |
392 TIP | TACK);
393 cuda->xstate = cx_listen;
394 return;
397 pio_write_8(&cuda->regs->sr, cuda->snd_buf[1]);
398 pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) ^ TACK);
399 cuda->bidx = 2;
401 cuda->xstate = cx_send;
404 /** Interrupt in send state.
406 * Send next byte or terminate transmission.
408 * @param cuda CUDA instance
410 static void cuda_irq_send(cuda_t *cuda)
412 if (cuda->bidx < cuda->snd_bytes) {
413 /* Send next byte. */
414 pio_write_8(&cuda->regs->sr,
415 cuda->snd_buf[cuda->bidx++]);
416 pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) ^ TACK);
417 return;
420 /* End transfer. */
421 cuda->snd_bytes = 0;
422 cuda->bidx = 0;
424 pio_write_8(&cuda->regs->acr, pio_read_8(&cuda->regs->acr) & ~SR_OUT);
425 pio_read_8(&cuda->regs->sr);
426 pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) | TACK | TIP);
428 cuda->xstate = cx_listen;
429 /* TODO: Match reply with request. */
432 static void cuda_packet_handle(cuda_t *cuda, uint8_t *data, size_t len)
434 if (data[0] != PT_ADB)
435 return;
436 if (len < 2)
437 return;
439 adb_packet_handle(cuda, data + 2, len - 2, (data[1] & 0x40) != 0);
442 static void adb_packet_handle(cuda_t *cuda, uint8_t *data, size_t size,
443 bool autopoll)
445 uint8_t dev_addr;
446 uint8_t reg_no;
447 uint16_t reg_val;
448 adb_dev_t *dev;
449 unsigned i;
451 dev_addr = data[0] >> 4;
452 reg_no = data[0] & 0x03;
454 if (size != 3) {
455 ddf_msg(LVL_WARN, "Unrecognized packet, size=%zu", size);
456 for (i = 0; i < size; ++i) {
457 ddf_msg(LVL_WARN, " 0x%02x", data[i]);
459 return;
462 if (reg_no != 0) {
463 ddf_msg(LVL_WARN, "Unrecognized packet, size=%zu", size);
464 for (i = 0; i < size; ++i) {
465 ddf_msg(LVL_WARN, " 0x%02x", data[i]);
467 return;
470 reg_val = ((uint16_t) data[1] << 8) | (uint16_t) data[2];
472 ddf_msg(LVL_DEBUG, "Received ADB packet for device address %d",
473 dev_addr);
474 dev = cuda->addr_dev[dev_addr];
475 if (dev == NULL)
476 return;
478 async_exch_t *exch = async_exchange_begin(dev->client_sess);
479 async_msg_1(exch, ADB_REG_NOTIF, reg_val);
480 async_exchange_end(exch);
483 static void cuda_autopoll_set(cuda_t *cuda, bool enable)
485 cuda->snd_buf[0] = PT_CUDA;
486 cuda->snd_buf[1] = CPT_AUTOPOLL;
487 cuda->snd_buf[2] = enable ? 0x01 : 0x00;
488 cuda->snd_bytes = 3;
489 cuda->bidx = 0;
491 cuda_send_start(cuda);
494 static void cuda_send_start(cuda_t *cuda)
496 assert(cuda->xstate == cx_listen);
498 if (cuda->snd_bytes == 0)
499 return;
501 /* Check for incoming data. */
502 if ((pio_read_8(&cuda->regs->b) & TREQ) == 0)
503 return;
505 pio_write_8(&cuda->regs->acr, pio_read_8(&cuda->regs->acr) | SR_OUT);
506 pio_write_8(&cuda->regs->sr, cuda->snd_buf[0]);
507 pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) & ~TIP);
509 cuda->xstate = cx_send_start;
512 /** @}