uspace/lib/virtio/virtio-pci.c

   1 /*
   2  * Copyright (c) 2018 Jakub Jermar
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  *
   9  * - Redistributions of source code must retain the above copyright
  10  *   notice, this list of conditions and the following disclaimer.
  11  * - Redistributions in binary form must reproduce the above copyright
  12  *   notice, this list of conditions and the following disclaimer in the
  13  *   documentation and/or other materials provided with the distribution.
  14  * - The name of the author may not be used to endorse or promote products
  15  *   derived from this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 /** @file VIRTIO support
  30  */
  31
  32 #include "virtio-pci.h"
  33
  34 #include <ddf/driver.h>
  35 #include <pci_dev_iface.h>
  36
  37 static void virtio_pci_common_cfg(virtio_dev_t *vdev, hw_resource_list_t *res,
  38     uint8_t bar, uint32_t offset, uint32_t length)
  39 {
  40         /* Proceed only if we don't have common config structure yet */
  41         if (vdev->common_cfg)
  42                 return;
  43
  44         /* We must ignore the capability if bar is greater than 5 */
  45         if (bar > 5)
  46                 return;
  47 }
  48
  49 errno_t virtio_pci_dev_init(ddf_dev_t *dev, virtio_dev_t *vdev)
  50 {
  51         async_sess_t *pci_sess = ddf_dev_parent_sess_get(dev);
  52         if (!pci_sess)
  53                 return ENOENT;
  54
  55         errno_t rc;
  56         hw_resource_list_t hw_res;
  57         rc = hw_res_get_resource_list(pci_sess, &hw_res);
  58         if (rc != EOK)
  59                 return rc;
  60
  61         /*
  62          * Find the VIRTIO PCI Capabilities
  63          */
  64         uint8_t c;
  65         uint8_t id;
  66         for (rc = pci_config_space_cap_first(pci_sess, &c, &id);
  67             (rc == EOK) && c;
  68             rc = pci_config_space_cap_next(pci_sess, &c, &id)) {
  69                 if (id == PCI_CAP_VENDORSPECID) {
  70                         uint8_t type;
  71                         rc = pci_config_space_read_8(pci_sess,
  72                             VIRTIO_PCI_CAP_TYPE(c), &type);
  73                         if (rc != EOK)
  74                                 return rc;
  75
  76                         uint8_t bar;
  77                         rc = pci_config_space_read_8(pci_sess,
  78                             VIRTIO_PCI_CAP_BAR(c), &bar);
  79                         if (rc != EOK)
  80                                 return rc;
  81
  82                         uint32_t offset;
  83                         rc = pci_config_space_read_32(pci_sess,
  84                             VIRTIO_PCI_CAP_OFFSET(c), &offset);
  85                         if (rc != EOK)
  86                                 return rc;
  87
  88                         uint32_t length;
  89                         rc = pci_config_space_read_32(pci_sess,
  90                             VIRTIO_PCI_CAP_LENGTH(c), &length);
  91                         if (rc != EOK)
  92                                 return rc;
  93
  94                         switch (type) {
  95                         case VIRTIO_PCI_CAP_COMMON_CFG:
  96                                 virtio_pci_common_cfg(vdev, &hw_res, bar,
  97                                     offset, length);
  98                                 break;
  99                         case VIRTIO_PCI_CAP_NOTIFY_CFG:
 100                                 break;
 101                         case VIRTIO_PCI_CAP_ISR_CFG:
 102                                 break;
 103                         case VIRTIO_PCI_CAP_DEVICE_CFG:
 104                                 break;
 105                         case VIRTIO_PCI_CAP_PCI_CFG:
 106                                 break;
 107                         default:
 108                                 break;
 109                         }
 110                 }
 111         }
 112
 113         return rc;
 114 }
 115
 116 /** @}
 117  */