Updated intel syntax x86-64 asm files to also support MS win64 call convention (ifdef...
[gromacs/rigid-bodies.git] / src / gmxlib / nonbonded / nb_kernel_x86_64_sse / nb_kernel132_x86_64_sse.h
blobd2180813ea863ef7a2efc52dab50d14c18dd8526
1 /* -*- mode: c; tab-width: 4; indent-tabs-mode: nil; c-basic-offset: 4; c-file-style: "stroustrup"; -*-
3 *
4 * This file is part of Gromacs Copyright (c) 1991-2004
5 * David van der Spoel, Erik Lindahl, University of Groningen.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
12 * To help us fund GROMACS development, we humbly ask that you cite
13 * the research papers on the package. Check out http://www.gromacs.org
15 * And Hey:
16 * Gnomes, ROck Monsters And Chili Sauce
18 #ifndef _NB_KERNEL132_X86_64_SSE_H_
19 #define _NB_KERNEL132_X86_64_SSE_H_
22 /*! \file nb_kernel132_x86_64_sse.h
23 * \brief x86_64 SSE-optimized versions of nonbonded kernel 132
25 * \internal
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 #if 0
33 #endif
35 /*! \brief Nonbonded kernel 132 with forces, optimized for x86_64 sse.
37 * \internal
39 * <b>Coulomb interaction:</b> Standard 1/r <br>
40 * <b>VdW interaction:</b> Tabulated <br>
41 * <b>Water optimization:</b> Pairs of SPC/TIP3P waters interaction <br>
42 * <b>Forces calculated:</b> Yes <br>
44 * \note All level1 and level2 nonbonded kernels use the same
45 * call sequence. Parameters are documented in nb_kernel.h
47 void
48 nb_kernel132_x86_64_sse (int * nri, int iinr[], int jindex[],
49 int jjnr[], int shift[], float shiftvec[],
50 float fshift[], int gid[], float pos[],
51 float faction[], float charge[], float * facel,
52 float * krf, float * crf, float Vc[],
53 int type[], int * ntype, float vdwparam[],
54 float Vvdw[], float * tabscale, float VFtab[],
55 float invsqrta[], float dvda[], float * gbtabscale,
56 float GBtab[], int * nthreads, int * count,
57 void * mtx, int * outeriter,int * inneriter,
58 float * work);
62 /*! \brief Nonbonded kernel 132 without forces, optimized for x86_64 sse.
64 * \internal
66 * <b>Coulomb interaction:</b> Standard 1/r <br>
67 * <b>VdW interaction:</b> Tabulated <br>
68 * <b>Water optimization:</b> Pairs of SPC/TIP3P waters interaction <br>
69 * <b>Forces calculated:</b> No <br>
71 * \note All level1 and level2 nonbonded kernels use the same
72 * call sequence. Parameters are documented in nb_kernel.h
74 void
75 nb_kernel132nf_x86_64_sse(int * nri, int iinr[], int jindex[],
76 int jjnr[], int shift[], float shiftvec[],
77 float fshift[], int gid[], float pos[],
78 float faction[], float charge[], float * facel,
79 float * krf, float * crf, float Vc[],
80 int type[], int * ntype, float vdwparam[],
81 float Vvdw[], float * tabscale, float VFtab[],
82 float invsqrta[], float dvda[], float * gbtabscale,
83 float GBtab[], int * nthreads, int * count,
84 void * mtx, int * outeriter,int * inneriter,
85 float * work);
88 #ifdef __cplusplus
90 #endif
93 #endif /* _NB_KERNEL132_X86_64_SSE_H_ */