src/mdlib/nbnxn_consts.h

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  35
  36 #ifndef _nbnxn_consts_h
  37 #define _nbnxn_consts_h
  38
  39 #ifdef __cplusplus
  40 extern "C" {
  41 #endif
  42
  43
  44 /* The number of pair-search sub-cells per super-cell, used for GPU */
  45 #define GPU_NSUBCELL_Z 2
  46 #define GPU_NSUBCELL_Y 2
  47 #define GPU_NSUBCELL_X 2
  48 #define GPU_NSUBCELL   (GPU_NSUBCELL_Z*GPU_NSUBCELL_Y*GPU_NSUBCELL_X)
  49 /* In the non-bonded GPU kernel we operate on cluster-pairs, not cells.
  50  * The number of cluster in a super-cluster matches the number of sub-cells
  51  * in a pair-search cell, so we introduce a new name for the same value.
  52  */
  53 #define NBNXN_GPU_NCLUSTER_PER_SUPERCLUSTER  GPU_NSUBCELL
  54
  55 /* With CPU kernels the i-cluster size is always 4 atoms.
  56  * With x86 SIMD the j-cluster size can be 2, 4 or 8, otherwise 4.
  57  */
  58 #define NBNXN_CPU_CLUSTER_I_SIZE       4
  59
  60 #define NBNXN_CPU_CLUSTER_I_SIZE_2LOG  2
  61
  62 /* With GPU kernels the cluster size is 8 atoms */
  63 #define NBNXN_GPU_CLUSTER_SIZE         8
  64
  65 /* With GPU kernels we group cluster pairs in 4 to optimize memory usage */
  66 #define NBNXN_GPU_JGROUP_SIZE  4
  67
  68 /* To avoid NaN when excluded atoms are at zero distance, we add a small
  69  * number to r^2. NBNXN_AVOID_SING_R2_INC^-3 should fit in real.
  70  */
  71 #ifndef GMX_DOUBLE
  72 #define NBNXN_AVOID_SING_R2_INC  1.0e-12f
  73 #else
  74 /* The double prec. x86 SIMD kernels use a single prec. invsqrt, so > 1e-38 */
  75 #define NBNXN_AVOID_SING_R2_INC  1.0e-36
  76 #endif
  77
  78 /* Coulomb force table size chosen such that it fits along the non-bonded
  79    parameters in the texture cache. */
  80 #define GPU_EWALD_COULOMB_FORCE_TABLE_SIZE 1536
  81
  82 #ifdef __cplusplus
  83 }
  84 #endif
  85
  86 #endif