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35 # include avx test source, used if the AVX flags are set below
36 include(gmxTestAVXMaskload)
37 include(gmxFindFlagsForSource)
39 # Macro that manages setting the respective C and C++ toolchain
40 # variables so that subsequent tests for SIMD support can work.
41 macro(prepare_x86_toolchain TOOLCHAIN_C_FLAGS_VARIABLE TOOLCHAIN_CXX_FLAGS_VARIABLE)
42 # On OS X, we often want to use gcc instead of clang, since gcc
43 # supports OpenMP (until clang 3.8, or so, plus whenever Apple
44 # support it in their version). However, by default gcc uses the
45 # external system assembler, which does not support AVX, so we
46 # need to tell the linker to use the clang compilers assembler
47 # instead - and this has to happen before we detect AVX flags.
48 if(APPLE AND CMAKE_C_COMPILER_ID STREQUAL "GNU")
49 gmx_test_cflag(GNU_C_USE_CLANG_AS "-Wa,-q" ${TOOLCHAIN_C_FLAGS_VARIABLE})
51 if(APPLE AND CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
52 gmx_test_cxxflag(GNU_CXX_USE_CLANG_AS "-Wa,-q" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
56 # Macro that manages setting the respective C and C++ toolchain
57 # variables so that subsequent tests for SIMD support can work.
58 macro(prepare_power_vsx_toolchain TOOLCHAIN_C_FLAGS_VARIABLE TOOLCHAIN_CXX_FLAGS_VARIABLE)
59 if(${CMAKE_CXX_COMPILER_ID} MATCHES "GNU" OR ${CMAKE_C_COMPILER_ID} MATCHES "GNU")
60 # VSX uses the same function API as Altivec/VMX, so make sure we tune for the current CPU and not VMX.
61 # By putting these flags here rather than in the general compiler flags file we can safely assume
62 # that we are at least on Power7 since that is when VSX appeared.
63 if(BUILD_CPU_BRAND MATCHES "POWER7")
64 gmx_test_cflag(GNU_C_VSX_POWER7 "-mcpu=power7 -mtune=power7" ${TOOLCHAIN_C_FLAGS_VARIABLE})
65 gmx_test_cflag(GNU_CXX_VSX_POWER7 "-mcpu=power7 -mtune=power7" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
67 # Enable power8 vector extensions on all platforms except old Power7.
68 gmx_test_cflag(GNU_C_VSX_POWER8 "-mcpu=power8 -mpower8-vector -mpower8-fusion -mdirect-move" ${TOOLCHAIN_C_FLAGS_VARIABLE})
69 gmx_test_cflag(GNU_CXX_VSX_POWER8 "-mcpu=power8 -mpower8-vector -mpower8-fusion -mdirect-move" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
71 # Altivec was originally single-only, and it took a while for compilers
72 # to support the double-precision features in VSX.
73 if(GMX_DOUBLE AND CMAKE_CXX_COMPILER_VERSION VERSION_LESS "4.9")
74 message(FATAL_ERROR "Using VSX SIMD in double precision with GCC requires GCC-4.9 or later.")
79 # Issue a fatal error with an appropriate message, when the toolchain
80 # was not able to compile code for SIMD support.
83 # SIMD_STRING A string describing the kind of SIMD support that didn't work.
84 # ALTERNATIVE_SUGGESTION A string describing anything the user could try other than getting a new compiler.
85 # SUGGEST_BINUTILS_UPDATE True when there's information that the compiler was OK, but something else was not.
86 function(gmx_give_fatal_error_when_simd_support_not_found SIMD_STRING ALTERNATIVE_SUGGESTION SUGGEST_BINUTILS_UPDATE)
87 if(SUGGEST_BINUTILS_UPDATE)
88 set(_msg "Found a compiler flag for ${SIMD_STRING} support, but some other problem exists. Update your assembler and/or linker, e.g. in the binutils package of your distribution.")
90 set(_msg "Cannot find ${SIMD_STRING} compiler flag. Use a newer compiler, or ${ALTERNATIVE_SUGGESTION}.")
92 message(FATAL_ERROR ${_msg})
95 macro(gmx_manage_simd)
97 set(GMX_SIMD_ACCURACY_BITS_SINGLE 22 CACHE STRING "Target mantissa bits for SIMD single math")
99 # Note that we typically restrict double precision target accuracy to be twice that
100 # of single. This means we only need one more N-R iteration for 1/sqrt(x) and 1(x),
101 # and the first iteration can sometimes be done as a pair in single precision. This should
102 # be plenty enough for Molecular Dynamics applications. Many of our double precision math
103 # functions still achieve very close to full double precision, but we do not guarantee that
104 # they will be able to achieve higher accuracy if you set this beyond 44 bits. GROMACS will
105 # work - but some unit tests might fail.
107 set(GMX_SIMD_ACCURACY_BITS_DOUBLE 44 CACHE STRING "Target mantissa bits for SIMD double math")
108 mark_as_advanced(GMX_SIMD_ACCURACY_BITS_SINGLE)
109 mark_as_advanced(GMX_SIMD_ACCURACY_BITS_DOUBLE)
111 if(${GMX_SIMD_ACCURACY_BITS_SINGLE} GREATER 22)
112 message(STATUS "Note: Full mantissa accuracy (including least significant bit) requested for SIMD single math. Presently we cannot get the least significant bit correct since that would require different algorithms - reducing to 22 bits.")
113 set(GMX_SIMD_ACCURACY_BITS_SINGLE 22 CACHE STRING "Target mantissa bits for SIMD single math" FORCE)
116 if(${GMX_SIMD_ACCURACY_BITS_DOUBLE} GREATER 51)
117 message(STATUS "Note: Full mantissa accuracy (including least significant bit) requested for SIMD double math. Presently we cannot get the least significant bit correct since that would require different algorithms - reducing to 51 bits.")
118 set(GMX_SIMD_ACCURACY_BITS_DOUBLE 51 CACHE STRING "Target mantissa bits for SIMD double math" FORCE)
122 # Section to set (and test) compiler flags for SIMD.
124 # The flags will be set based on the GMX_SIMD choice provided by the user.
125 # Automatic detection of the architecture on the build host is done prior to
126 # calling this macro.
129 if(GMX_SIMD STREQUAL "NONE")
130 # nothing to do configuration-wise
131 set(SIMD_STATUS_MESSAGE "SIMD instructions disabled")
132 elseif(GMX_SIMD STREQUAL "SSE2")
135 "#include<xmmintrin.h>
136 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_rsqrt_ps(x);return _mm_movemask_ps(x);}"
137 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
138 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
139 "-msse2" "/arch:SSE2" "-hgnu")
141 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
142 gmx_give_fatal_error_when_simd_support_not_found("SSE2" "disable SIMD support (slow)" "${SUGGEST_BINUTILS_UPDATE}")
145 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
146 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
147 set(GMX_SIMD_X86_${GMX_SIMD} 1)
148 set(SIMD_STATUS_MESSAGE "Enabling SSE2 SIMD instructions")
150 elseif(GMX_SIMD STREQUAL "SSE4.1")
152 # Note: MSVC enables SSE4.1 with the SSE2 flag, so we include that in testing.
154 "#include<smmintrin.h>
155 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_dp_ps(x,x,0x77);return _mm_movemask_ps(x);}"
156 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
157 SIMD_SSE_4_1_C_FLAGS SIMD_SSE_4_1_CXX_FLAGS
158 "-msse4.1" "/arch:SSE4.1" "/arch:SSE2" "-hgnu")
160 if(NOT SIMD_SSE_4_1_C_FLAGS OR NOT SIMD_SSE_4_1_CXX_FLAGS)
161 gmx_give_fatal_error_when_simd_support_not_found("SSE4.1" "choose SSE2 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
164 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
165 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
166 set(GMX_SIMD_X86_SSE4_1 1)
167 set(SIMD_STATUS_MESSAGE "Enabling SSE4.1 SIMD instructions")
169 elseif(GMX_SIMD STREQUAL "AVX_128_FMA")
171 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
173 # We don't have the full compiler version string yet (BUILD_C_COMPILER),
174 # so we can't distinguish vanilla from Apple clang versions, but catering for a few rare AMD
175 # hackintoshes is not worth the effort.
176 if (APPLE AND (CMAKE_C_COMPILER_ID STREQUAL "Clang" OR
177 CMAKE_CXX_COMPILER_ID STREQUAL "Clang"))
178 message(WARNING "Due to a known compiler bug, Clang up to version 3.2 (and Apple Clang up to version 4.1) produces incorrect code with AVX_128_FMA SIMD. As we cannot work around this bug on OS X, you will have to select a different compiler or SIMD instruction set.")
181 # clang <=3.2 contains a bug that causes incorrect code to be generated for the
182 # vfmaddps instruction and therefore the bug is triggered with AVX_128_FMA.
183 # (see: http://llvm.org/bugs/show_bug.cgi?id=15040).
184 # We can work around this by not using the integrated assembler (except on OS X
185 # which has an outdated assembler that does not support AVX instructions).
186 if (CMAKE_C_COMPILER_ID MATCHES "Clang" AND CMAKE_C_COMPILER_VERSION VERSION_LESS "3.3")
187 # we assume that we have an external assembler that supports AVX
188 message(STATUS "Clang ${CMAKE_C_COMPILER_VERSION} detected, enabling FMA bug workaround")
189 set(TOOLCHAIN_C_FLAGS "${TOOLCHAIN_C_FLAGS} -no-integrated-as")
191 if (CMAKE_CXX_COMPILER_ID MATCHES "Clang" AND CMAKE_CXX_COMPILER_VERSION VERSION_LESS "3.3")
192 # we assume that we have an external assembler that supports AVX
193 message(STATUS "Clang ${CMAKE_CXX_COMPILER_VERSION} detected, enabling FMA bug workaround")
194 set(TOOLCHAIN_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS} -no-integrated-as")
197 # AVX128/FMA on AMD is a bit complicated. We need to do detection in three stages:
198 # 1) Find the flags required for generic AVX support
199 # 2) Find the flags necessary to enable fused-multiply add support
200 # 3) Optional: Find a flag to enable the AMD XOP instructions
202 ### STAGE 1: Find the generic AVX flag
204 "#include<immintrin.h>
205 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_permute_ps(x,1);return 0;}"
206 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
207 SIMD_GENERIC_AVX_C_FLAGS SIMD_GENERIC_AVX_CXX_FLAGS
208 "-mavx" "/arch:AVX" "-hgnu")
210 ### STAGE 2: Find the fused-multiply add flag.
211 # GCC requires x86intrin.h for FMA support. MSVC 2010 requires intrin.h for FMA support.
212 check_include_file(x86intrin.h HAVE_X86INTRIN_H ${SIMD_C_FLAGS})
213 check_include_file(intrin.h HAVE_INTRIN_H ${SIMD_C_FLAGS})
215 set(INCLUDE_X86INTRIN_H "#include <x86intrin.h>")
218 set(INCLUDE_INTRIN_H "#include <xintrin.h>")
222 "#include<immintrin.h>
223 ${INCLUDE_X86INTRIN_H}
225 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_macc_ps(x,x,x);return _mm_movemask_ps(x);}"
226 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
227 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
230 # We only need to check the last (FMA) test; that will always fail if the generic AVX test failed
231 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
232 gmx_give_fatal_error_when_simd_support_not_found("128-bit AVX with FMA support" "choose SSE4.1 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
235 ### STAGE 3: Optional: Find the XOP instruction flag (No point in yelling if this does not work)
237 "#include<immintrin.h>
238 ${INCLUDE_X86INTRIN_H}
240 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_frcz_ps(x);return _mm_movemask_ps(x);}"
241 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
242 SIMD_AVX_128_XOP_C_FLAGS SIMD_AVX_128_XOP_CXX_FLAGS
245 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
246 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
247 set(GMX_SIMD_X86_${GMX_SIMD} 1)
248 set(SIMD_STATUS_MESSAGE "Enabling 128-bit AVX SIMD GROMACS SIMD (with fused-multiply add)")
250 gmx_test_avx_gcc_maskload_bug(GMX_SIMD_X86_AVX_GCC_MASKLOAD_BUG "${SIMD_C_FLAGS}")
252 elseif(GMX_SIMD STREQUAL "AVX_256")
254 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
257 "#include<immintrin.h>
258 int main(){__m256 x=_mm256_set1_ps(0.5);x=_mm256_add_ps(x,x);return _mm256_movemask_ps(x);}"
259 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
260 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
261 "-mavx" "/arch:AVX" "-hgnu")
263 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
264 gmx_give_fatal_error_when_simd_support_not_found("AVX" "choose SSE4.1 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
267 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
268 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
269 set(GMX_SIMD_X86_${GMX_SIMD} 1)
270 set(SIMD_STATUS_MESSAGE "Enabling 256-bit AVX SIMD instructions")
272 gmx_test_avx_gcc_maskload_bug(GMX_SIMD_X86_AVX_GCC_MASKLOAD_BUG "${SIMD_C_FLAGS}")
274 elseif(GMX_SIMD STREQUAL "AVX2_256")
276 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
279 "#include<immintrin.h>
280 int main(){__m256i x=_mm256_set1_epi32(5);x=_mm256_add_epi32(x,x);return _mm256_movemask_epi8(x);}"
281 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
282 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
283 "-march=core-avx2" "-mavx2" "/arch:AVX" "-hgnu") # no AVX2-specific flag for MSVC yet
285 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
286 gmx_give_fatal_error_when_simd_support_not_found("AVX2" "choose AVX SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
289 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
290 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
291 set(GMX_SIMD_X86_${GMX_SIMD} 1)
292 set(SIMD_STATUS_MESSAGE "Enabling 256-bit AVX2 SIMD instructions")
294 # No need to test for Maskload bug - it was fixed before gcc added AVX2 support
296 elseif(GMX_SIMD STREQUAL "MIC")
298 # No flags needed. Not testing.
299 set(GMX_SIMD_X86_MIC 1)
300 set(SIMD_STATUS_MESSAGE "Enabling MIC (Xeon Phi) SIMD instructions")
302 elseif(GMX_SIMD STREQUAL "AVX_512")
304 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
307 "#include<immintrin.h>
308 int main(){__m512 y,x=_mm512_set1_ps(0.5);y=_mm512_fmadd_ps(x,x,x);return (int)_mm512_cmp_ps_mask(x,y,_CMP_LT_OS);}"
309 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
310 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
311 "-xMIC-AVX512" "-mavx512f -mfma" "-mavx512f" "/arch:AVX" "-hgnu") # no AVX_512F flags known for MSVC yet
313 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
314 gmx_give_fatal_error_when_simd_support_not_found("AVX 512F" "choose a lower level of SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
317 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
318 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
319 set(GMX_SIMD_X86_${GMX_SIMD} 1)
320 set(SIMD_STATUS_MESSAGE "Enabling 512-bit AVX-512 SIMD instructions")
322 elseif(GMX_SIMD STREQUAL "AVX_512_KNL")
324 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
327 "#include<immintrin.h>
328 int main(){__m512 y,x=_mm512_set1_ps(0.5);y=_mm512_rsqrt28_ps(x);return (int)_mm512_cmp_ps_mask(x,y,_CMP_LT_OS);}"
329 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
330 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
331 "-xMIC-AVX512" "-mavx512er -mfma" "-mavx512er" "/arch:AVX" "-hgnu") # no AVX_512ER flags known for MSVC yet
333 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
334 gmx_give_fatal_error_when_simd_support_not_found("AVX 512ER" "choose a lower level of SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
337 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
338 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
339 set(GMX_SIMD_X86_${GMX_SIMD} 1)
340 set(SIMD_STATUS_MESSAGE "Enabling 512-bit AVX-512-KNL SIMD instructions")
342 elseif(GMX_SIMD STREQUAL "ARM_NEON")
345 "#include<arm_neon.h>
346 int main(){float32x4_t x=vdupq_n_f32(0.5);x=vmlaq_f32(x,x,x);return vgetq_lane_f32(x,0)>0;}"
347 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
348 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
349 "-mfpu=neon-vfpv4" "-mfpu=neon" "")
351 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
352 gmx_give_fatal_error_when_simd_support_not_found("ARM NEON" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
355 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
356 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
357 set(GMX_SIMD_${GMX_SIMD} 1)
358 set(SIMD_STATUS_MESSAGE "Enabling 32-bit ARM NEON SIMD instructions")
360 elseif(GMX_SIMD STREQUAL "ARM_NEON_ASIMD")
363 "#include<arm_neon.h>
364 int main(){float64x2_t x=vdupq_n_f64(0.5);x=vfmaq_f64(x,x,x);x=vrndnq_f64(x);return vgetq_lane_f64(x,0)>0;}"
365 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
366 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
369 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
370 gmx_give_fatal_error_when_simd_support_not_found("ARM (AArch64) NEON Advanced SIMD" "particularly gcc version 4.9 or later, or disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
373 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
374 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
375 set(GMX_SIMD_${GMX_SIMD} 1)
376 set(SIMD_STATUS_MESSAGE "Enabling ARM (AArch64) NEON Advanced SIMD instructions")
378 elseif(GMX_SIMD STREQUAL "IBM_QPX")
380 try_compile(TEST_QPX ${CMAKE_BINARY_DIR}
381 "${CMAKE_SOURCE_DIR}/cmake/TestQPX.c")
384 message(WARNING "IBM QPX SIMD instructions selected. This will work, but SIMD kernels are only available for the Verlet cut-off scheme. The plain C kernels that are used for the group cut-off scheme kernels will be slow, so please consider using the Verlet cut-off scheme.")
385 set(GMX_SIMD_${GMX_SIMD} 1)
386 set(SIMD_STATUS_MESSAGE "Enabling IBM QPX SIMD instructions")
389 gmx_give_fatal_error_when_simd_support_not_found("IBM QPX" "or 'cmake .. -DCMAKE_TOOLCHAIN_FILE=Platform/BlueGeneQ-static-XL-CXX' to set up the tool chain" "${SUGGEST_BINUTILS_UPDATE}")
392 elseif(GMX_SIMD STREQUAL "IBM_VMX")
396 int main(){vector float x,y=vec_ctf(vec_splat_s32(1),0);x=vec_madd(y,y,y);return vec_all_ge(y,x);}"
397 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
398 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
399 "-maltivec -mabi=altivec" "-qarch=auto -qaltivec")
401 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
402 gmx_give_fatal_error_when_simd_support_not_found("IBM VMX" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
405 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
406 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
407 set(GMX_SIMD_${GMX_SIMD} 1)
408 set(SIMD_STATUS_MESSAGE "Enabling IBM VMX SIMD instructions")
410 elseif(GMX_SIMD STREQUAL "IBM_VSX")
412 prepare_power_vsx_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
416 int main(){vector double x,y=vec_splats(1.0);x=vec_madd(y,y,y);return vec_all_ge(y,x);}"
417 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
418 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
419 "-mvsx" "-maltivec -mabi=altivec" "-qarch=auto -qaltivec")
421 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
422 gmx_give_fatal_error_when_simd_support_not_found("IBM VSX" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
425 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
426 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
427 set(GMX_SIMD_${GMX_SIMD} 1)
428 set(SIMD_STATUS_MESSAGE "Enabling IBM VSX SIMD instructions")
430 elseif(GMX_SIMD STREQUAL "SPARC64_HPC_ACE")
432 # Note that GMX_RELAXED_DOUBLE_PRECISION is enabled by default in the top-level CMakeLists.txt
434 set(GMX_SIMD_${GMX_SIMD} 1)
435 set(SIMD_STATUS_MESSAGE "Enabling Sparc64 HPC-ACE SIMD instructions")
437 elseif(GMX_SIMD STREQUAL "REFERENCE")
439 # NB: This file handles settings for the SIMD module, so in the interest
440 # of proper modularization, please do NOT put any verlet kernel settings in this file.
442 if(GMX_SIMD_REF_FLOAT_WIDTH)
443 add_definitions(-DGMX_SIMD_REF_FLOAT_WIDTH=${GMX_SIMD_REF_FLOAT_WIDTH})
445 if(GMX_SIMD_REF_DOUBLE_WIDTH)
446 add_definitions(-DGMX_SIMD_REF_DOUBLE_WIDTH=${GMX_SIMD_REF_DOUBLE_WIDTH})
449 set(GMX_SIMD_${GMX_SIMD} 1)
450 set(SIMD_STATUS_MESSAGE "Enabling reference (emulated) SIMD instructions.")
453 gmx_invalid_option_value(GMX_SIMD)
457 gmx_check_if_changed(SIMD_CHANGED GMX_SIMD)
458 if (SIMD_CHANGED AND DEFINED SIMD_STATUS_MESSAGE)
459 message(STATUS "${SIMD_STATUS_MESSAGE}")
462 # By default, 32-bit windows cannot pass SIMD (SSE/AVX) arguments in registers,
463 # and even on 64-bit (all platforms) it is only used for a handful of arguments.
464 # The __vectorcall (MSVC, from MSVC2013) or __regcall (ICC) calling conventions
465 # enable this, which is critical to enable 32-bit SIMD and improves performance
467 # Check if the compiler supports one of these, and in that case set gmx_simdcall
468 # to that string. If we do not have any such calling convention modifier, set it
469 # to an empty string.
471 # Update 2015-11-04: As of version 3.6, clang has added support for __vectorcall
472 # (also on Linux). This appears to be buggy for the reference SIMD
473 # implementation when using the Debug build (when functions are not inlined)
474 # while it seems works fine for the actual SIMD implementations. This is likely
475 # because the reference build ends up passing lots of structures with arrays
476 # rather than actual vector data. For now we disable __vectorcall with clang
477 # when using the reference build.
479 if(NOT DEFINED GMX_SIMD_CALLING_CONVENTION)
481 set(CALLCONV_LIST " ")
482 elseif(CMAKE_CXX_COMPILER_ID MATCHES "Clang" AND GMX_SIMD STREQUAL "REFERENCE")
483 set(CALLCONV_LIST __regcall " ")
485 set(CALLCONV_LIST __vectorcall __regcall " ")
487 foreach(callconv ${CALLCONV_LIST})
488 set(callconv_compile_var "_callconv_${callconv}")
489 check_c_source_compiles("int ${callconv} f(int i) {return i;} int main(void) {return f(0);}" ${callconv_compile_var})
490 if(${callconv_compile_var})
491 set(GMX_SIMD_CALLING_CONVENTION "${callconv}" CACHE INTERNAL "Calling convention for SIMD routines" FORCE)