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36 include(gmxFindFlagsForSource)
38 # Macro that manages setting the respective C and C++ toolchain
39 # variables so that subsequent tests for SIMD support can work.
40 macro(prepare_x86_toolchain TOOLCHAIN_C_FLAGS_VARIABLE TOOLCHAIN_CXX_FLAGS_VARIABLE)
41 # On OS X, we often want to use gcc instead of clang, since gcc
42 # supports OpenMP (until clang 3.8, or so, plus whenever Apple
43 # support it in their version). However, by default gcc uses the
44 # external system assembler, which does not support AVX, so we
45 # need to tell the linker to use the clang compilers assembler
46 # instead - and this has to happen before we detect AVX flags.
47 if(APPLE AND CMAKE_C_COMPILER_ID STREQUAL "GNU")
48 gmx_test_cflag(GNU_C_USE_CLANG_AS "-Wa,-q" ${TOOLCHAIN_C_FLAGS_VARIABLE})
50 if(APPLE AND CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
51 gmx_test_cxxflag(GNU_CXX_USE_CLANG_AS "-Wa,-q" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
55 # Macro that manages setting the respective C and C++ toolchain
56 # variables so that subsequent tests for SIMD support can work.
57 macro(prepare_power_vsx_toolchain TOOLCHAIN_C_FLAGS_VARIABLE TOOLCHAIN_CXX_FLAGS_VARIABLE)
58 if(${CMAKE_CXX_COMPILER_ID} MATCHES "GNU" OR ${CMAKE_C_COMPILER_ID} MATCHES "GNU")
59 # VSX uses the same function API as Altivec/VMX, so make sure we tune for the current CPU and not VMX.
60 # By putting these flags here rather than in the general compiler flags file we can safely assume
61 # that we are at least on Power7 since that is when VSX appeared.
62 gmx_run_cpu_detection(brand)
63 if(CPU_DETECTION_BRAND MATCHES "POWER7")
64 gmx_test_cflag(GNU_C_VSX_POWER7 "-mcpu=power7 -mtune=power7" ${TOOLCHAIN_C_FLAGS_VARIABLE})
65 gmx_test_cflag(GNU_CXX_VSX_POWER7 "-mcpu=power7 -mtune=power7" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
67 # Enable power8 vector extensions on all platforms except old Power7.
68 gmx_test_cflag(GNU_C_VSX_POWER8 "-mcpu=power8 -mpower8-vector -mpower8-fusion -mdirect-move" ${TOOLCHAIN_C_FLAGS_VARIABLE})
69 gmx_test_cflag(GNU_CXX_VSX_POWER8 "-mcpu=power8 -mpower8-vector -mpower8-fusion -mdirect-move" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
71 # Altivec was originally single-only, and it took a while for compilers
72 # to support the double-precision features in VSX.
73 if(GMX_DOUBLE AND CMAKE_CXX_COMPILER_VERSION VERSION_LESS "4.9")
74 message(FATAL_ERROR "Using VSX SIMD in double precision with GCC requires GCC-4.9 or later.")
77 if(${CMAKE_CXX_COMPILER_ID} MATCHES "XL" OR ${CMAKE_C_COMPILER_ID} MATCHES "XL")
78 if(CMAKE_CXX_COMPILER_VERSION VERSION_LESS "13.1.5" OR CMAKE_C_COMPILER_VERSION VERSION_LESS "13.1.5")
79 message(FATAL_ERROR "Using VSX SIMD requires XL compiler version 13.1.5 or later.")
84 # Issue a fatal error with an appropriate message, when the toolchain
85 # was not able to compile code for SIMD support.
88 # SIMD_STRING A string describing the kind of SIMD support that didn't work.
89 # ALTERNATIVE_SUGGESTION A string describing anything the user could try other than getting a new compiler.
90 # SUGGEST_BINUTILS_UPDATE True when there's information that the compiler was OK, but something else was not.
91 function(gmx_give_fatal_error_when_simd_support_not_found SIMD_STRING ALTERNATIVE_SUGGESTION SUGGEST_BINUTILS_UPDATE)
92 if(SUGGEST_BINUTILS_UPDATE)
93 set(_msg "Found a compiler flag for ${SIMD_STRING} support, but some other problem exists. Update your assembler and/or linker, e.g. in the binutils package of your distribution.")
95 set(_msg "Cannot find ${SIMD_STRING} compiler flag. Use a newer compiler, or ${ALTERNATIVE_SUGGESTION}.")
97 message(FATAL_ERROR ${_msg})
100 macro(gmx_manage_simd)
102 set(GMX_SIMD_ACCURACY_BITS_SINGLE 22 CACHE STRING "Target mantissa bits for SIMD single math")
104 # Note that we typically restrict double precision target accuracy to be twice that
105 # of single. This means we only need one more N-R iteration for 1/sqrt(x) and 1(x),
106 # and the first iteration can sometimes be done as a pair in single precision. This should
107 # be plenty enough for Molecular Dynamics applications. Many of our double precision math
108 # functions still achieve very close to full double precision, but we do not guarantee that
109 # they will be able to achieve higher accuracy if you set this beyond 44 bits. GROMACS will
110 # work - but some unit tests might fail.
112 set(GMX_SIMD_ACCURACY_BITS_DOUBLE 44 CACHE STRING "Target mantissa bits for SIMD double math")
113 mark_as_advanced(GMX_SIMD_ACCURACY_BITS_SINGLE)
114 mark_as_advanced(GMX_SIMD_ACCURACY_BITS_DOUBLE)
116 if(${GMX_SIMD_ACCURACY_BITS_SINGLE} GREATER 22)
117 message(STATUS "Note: Full mantissa accuracy (including least significant bit) requested for SIMD single math. Presently we cannot get the least significant bit correct since that would require different algorithms - reducing to 22 bits.")
118 set(GMX_SIMD_ACCURACY_BITS_SINGLE 22 CACHE STRING "Target mantissa bits for SIMD single math" FORCE)
121 if(${GMX_SIMD_ACCURACY_BITS_DOUBLE} GREATER 51)
122 message(STATUS "Note: Full mantissa accuracy (including least significant bit) requested for SIMD double math. Presently we cannot get the least significant bit correct since that would require different algorithms - reducing to 51 bits.")
123 set(GMX_SIMD_ACCURACY_BITS_DOUBLE 51 CACHE STRING "Target mantissa bits for SIMD double math" FORCE)
127 # Section to set (and test) compiler flags for SIMD.
129 # The flags will be set based on the GMX_SIMD choice provided by the user.
130 # Automatic detection of the architecture on the build host is done prior to
131 # calling this macro.
134 if(GMX_SIMD STREQUAL "NONE")
135 # nothing to do configuration-wise
136 set(SIMD_STATUS_MESSAGE "SIMD instructions disabled")
137 elseif(GMX_SIMD STREQUAL "SSE2")
140 "#include<xmmintrin.h>
141 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_rsqrt_ps(x);return _mm_movemask_ps(x);}"
142 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
143 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
144 "-msse2" "/arch:SSE2" "-hgnu")
146 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
147 gmx_give_fatal_error_when_simd_support_not_found("SSE2" "disable SIMD support (slow)" "${SUGGEST_BINUTILS_UPDATE}")
150 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
151 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
152 set(GMX_SIMD_X86_${GMX_SIMD} 1)
153 set(SIMD_STATUS_MESSAGE "Enabling SSE2 SIMD instructions")
155 elseif(GMX_SIMD STREQUAL "SSE4.1")
157 # Note: MSVC enables SSE4.1 with the SSE2 flag, so we include that in testing.
159 "#include<smmintrin.h>
160 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_dp_ps(x,x,0x77);return _mm_movemask_ps(x);}"
161 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
162 SIMD_SSE_4_1_C_FLAGS SIMD_SSE_4_1_CXX_FLAGS
163 "-msse4.1" "/arch:SSE4.1" "/arch:SSE2" "-hgnu")
165 if(NOT SIMD_SSE_4_1_C_FLAGS OR NOT SIMD_SSE_4_1_CXX_FLAGS)
166 gmx_give_fatal_error_when_simd_support_not_found("SSE4.1" "choose SSE2 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
169 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
170 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
171 set(GMX_SIMD_X86_SSE4_1 1)
172 set(SIMD_STATUS_MESSAGE "Enabling SSE4.1 SIMD instructions")
174 elseif(GMX_SIMD STREQUAL "AVX_128_FMA")
176 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
178 # We don't have the full compiler version string yet (BUILD_C_COMPILER),
179 # so we can't distinguish vanilla from Apple clang versions, but catering for a few rare AMD
180 # hackintoshes is not worth the effort.
181 if (APPLE AND (CMAKE_C_COMPILER_ID STREQUAL "Clang" OR
182 CMAKE_CXX_COMPILER_ID STREQUAL "Clang"))
183 message(WARNING "Due to a known compiler bug, Clang up to version 3.2 (and Apple Clang up to version 4.1) produces incorrect code with AVX_128_FMA SIMD. As we cannot work around this bug on OS X, you will have to select a different compiler or SIMD instruction set.")
186 # clang <=3.2 contains a bug that causes incorrect code to be generated for the
187 # vfmaddps instruction and therefore the bug is triggered with AVX_128_FMA.
188 # (see: http://llvm.org/bugs/show_bug.cgi?id=15040).
189 # We can work around this by not using the integrated assembler (except on OS X
190 # which has an outdated assembler that does not support AVX instructions).
191 if (CMAKE_C_COMPILER_ID MATCHES "Clang" AND CMAKE_C_COMPILER_VERSION VERSION_LESS "3.3")
192 # we assume that we have an external assembler that supports AVX
193 message(STATUS "Clang ${CMAKE_C_COMPILER_VERSION} detected, enabling FMA bug workaround")
194 set(TOOLCHAIN_C_FLAGS "${TOOLCHAIN_C_FLAGS} -no-integrated-as")
196 if (CMAKE_CXX_COMPILER_ID MATCHES "Clang" AND CMAKE_CXX_COMPILER_VERSION VERSION_LESS "3.3")
197 # we assume that we have an external assembler that supports AVX
198 message(STATUS "Clang ${CMAKE_CXX_COMPILER_VERSION} detected, enabling FMA bug workaround")
199 set(TOOLCHAIN_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS} -no-integrated-as")
202 # AVX128/FMA on AMD is a bit complicated. We need to do detection in three stages:
203 # 1) Find the flags required for generic AVX support
204 # 2) Find the flags necessary to enable fused-multiply add support
205 # 3) Optional: Find a flag to enable the AMD XOP instructions
207 ### STAGE 1: Find the generic AVX flag
209 "#include<immintrin.h>
210 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_permute_ps(x,1);return 0;}"
211 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
212 SIMD_GENERIC_AVX_C_FLAGS SIMD_GENERIC_AVX_CXX_FLAGS
213 "-mavx" "/arch:AVX" "-hgnu")
215 ### STAGE 2: Find the fused-multiply add flag.
216 # GCC requires x86intrin.h for FMA support. MSVC 2010 requires intrin.h for FMA support.
217 check_include_file(x86intrin.h HAVE_X86INTRIN_H ${SIMD_C_FLAGS})
218 check_include_file(intrin.h HAVE_INTRIN_H ${SIMD_C_FLAGS})
220 set(INCLUDE_X86INTRIN_H "#include <x86intrin.h>")
223 set(INCLUDE_INTRIN_H "#include <xintrin.h>")
227 "#include<immintrin.h>
228 ${INCLUDE_X86INTRIN_H}
230 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_macc_ps(x,x,x);return _mm_movemask_ps(x);}"
231 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
232 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
235 # We only need to check the last (FMA) test; that will always fail if the generic AVX test failed
236 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
237 gmx_give_fatal_error_when_simd_support_not_found("128-bit AVX with FMA support" "choose SSE4.1 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
240 ### STAGE 3: Optional: Find the XOP instruction flag (No point in yelling if this does not work)
242 "#include<immintrin.h>
243 ${INCLUDE_X86INTRIN_H}
245 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_frcz_ps(x);return _mm_movemask_ps(x);}"
246 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
247 SIMD_AVX_128_XOP_C_FLAGS SIMD_AVX_128_XOP_CXX_FLAGS
250 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
251 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
252 set(GMX_SIMD_X86_${GMX_SIMD} 1)
253 set(SIMD_STATUS_MESSAGE "Enabling 128-bit AVX SIMD GROMACS SIMD (with fused-multiply add)")
255 elseif(GMX_SIMD STREQUAL "AVX_256")
257 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
260 "#include<immintrin.h>
261 int main(){__m256 x=_mm256_set1_ps(0.5);x=_mm256_add_ps(x,x);return _mm256_movemask_ps(x);}"
262 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
263 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
264 "-mavx" "/arch:AVX" "-hgnu")
266 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
267 gmx_give_fatal_error_when_simd_support_not_found("AVX" "choose SSE4.1 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
270 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
271 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
272 set(GMX_SIMD_X86_${GMX_SIMD} 1)
273 set(SIMD_STATUS_MESSAGE "Enabling 256-bit AVX SIMD instructions")
275 elseif(GMX_SIMD MATCHES "AVX2_")
277 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
280 "#include<immintrin.h>
281 int main(){__m256i x=_mm256_set1_epi32(5);x=_mm256_add_epi32(x,x);return _mm256_movemask_epi8(x);}"
282 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
283 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
284 "-march=core-avx2" "-mavx2" "/arch:AVX" "-hgnu") # no AVX2-specific flag for MSVC yet
286 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
287 gmx_give_fatal_error_when_simd_support_not_found("AVX2" "choose AVX SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
290 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
291 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
292 set(GMX_SIMD_X86_${GMX_SIMD} 1)
294 if(GMX_SIMD STREQUAL "AVX2_128")
295 set(SIMD_STATUS_MESSAGE "Enabling 128-bit AVX2 SIMD instructions")
297 set(SIMD_STATUS_MESSAGE "Enabling 256-bit AVX2 SIMD instructions")
300 elseif(GMX_SIMD STREQUAL "MIC")
302 # No flags needed. Not testing.
303 set(GMX_SIMD_X86_MIC 1)
304 set(SIMD_STATUS_MESSAGE "Enabling MIC (Xeon Phi) SIMD instructions")
306 elseif(GMX_SIMD STREQUAL "AVX_512")
308 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
311 "#include<immintrin.h>
312 int main(){__m512 y,x=_mm512_set1_ps(0.5);y=_mm512_fmadd_ps(x,x,x);return (int)_mm512_cmp_ps_mask(x,y,_CMP_LT_OS);}"
313 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
314 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
315 "-xCORE-AVX512" "-mavx512f -mfma" "-mavx512f" "/arch:AVX" "-hgnu") # no AVX_512F flags known for MSVC yet
317 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
318 gmx_give_fatal_error_when_simd_support_not_found("AVX 512F" "choose a lower level of SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
321 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
322 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
323 set(GMX_SIMD_X86_${GMX_SIMD} 1)
324 set(SIMD_STATUS_MESSAGE "Enabling 512-bit AVX-512 SIMD instructions")
326 elseif(GMX_SIMD STREQUAL "AVX_512_KNL")
328 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
331 "#include<immintrin.h>
332 int main(){__m512 y,x=_mm512_set1_ps(0.5);y=_mm512_rsqrt28_ps(x);return (int)_mm512_cmp_ps_mask(x,y,_CMP_LT_OS);}"
333 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
334 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
335 "-xMIC-AVX512" "-mavx512er -mfma" "-mavx512er" "/arch:AVX" "-hgnu") # no AVX_512ER flags known for MSVC yet
337 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
338 gmx_give_fatal_error_when_simd_support_not_found("AVX 512ER" "choose a lower level of SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
341 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
342 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
343 set(GMX_SIMD_X86_${GMX_SIMD} 1)
344 set(SIMD_STATUS_MESSAGE "Enabling 512-bit AVX-512-KNL SIMD instructions")
346 elseif(GMX_SIMD STREQUAL "ARM_NEON")
349 "#include<arm_neon.h>
350 int main(){float32x4_t x=vdupq_n_f32(0.5);x=vmlaq_f32(x,x,x);return vgetq_lane_f32(x,0)>0;}"
351 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
352 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
353 "-mfpu=neon-vfpv4" "-mfpu=neon" "")
355 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
356 gmx_give_fatal_error_when_simd_support_not_found("ARM NEON" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
359 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
360 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
361 set(GMX_SIMD_${GMX_SIMD} 1)
362 set(SIMD_STATUS_MESSAGE "Enabling 32-bit ARM NEON SIMD instructions")
364 elseif(GMX_SIMD STREQUAL "ARM_NEON_ASIMD")
367 "#include<arm_neon.h>
368 int main(){float64x2_t x=vdupq_n_f64(0.5);x=vfmaq_f64(x,x,x);x=vrndnq_f64(x);return vgetq_lane_f64(x,0)>0;}"
369 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
370 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
373 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
374 gmx_give_fatal_error_when_simd_support_not_found("ARM (AArch64) NEON Advanced SIMD" "particularly gcc version 4.9 or later, or disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
377 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
378 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
379 set(GMX_SIMD_${GMX_SIMD} 1)
380 set(SIMD_STATUS_MESSAGE "Enabling ARM (AArch64) NEON Advanced SIMD instructions")
382 elseif(GMX_SIMD STREQUAL "IBM_QPX")
384 try_compile(TEST_QPX ${CMAKE_BINARY_DIR}
385 "${CMAKE_SOURCE_DIR}/cmake/TestQPX.c")
388 message(WARNING "IBM QPX SIMD instructions selected. This will work, but SIMD kernels are only available for the Verlet cut-off scheme. The plain C kernels that are used for the group cut-off scheme kernels will be slow, so please consider using the Verlet cut-off scheme.")
389 set(GMX_SIMD_${GMX_SIMD} 1)
390 set(SIMD_STATUS_MESSAGE "Enabling IBM QPX SIMD instructions")
393 gmx_give_fatal_error_when_simd_support_not_found("IBM QPX" "or 'cmake .. -DCMAKE_TOOLCHAIN_FILE=Platform/BlueGeneQ-static-bgclang-CXX' to set up the tool chain" "${SUGGEST_BINUTILS_UPDATE}")
396 elseif(GMX_SIMD STREQUAL "IBM_VMX")
400 int main(){vector float x,y=vec_ctf(vec_splat_s32(1),0);x=vec_madd(y,y,y);return vec_all_ge(y,x);}"
401 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
402 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
403 "-maltivec -mabi=altivec" "-qarch=auto -qaltivec")
405 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
406 gmx_give_fatal_error_when_simd_support_not_found("IBM VMX" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
409 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
410 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
411 set(GMX_SIMD_${GMX_SIMD} 1)
412 set(SIMD_STATUS_MESSAGE "Enabling IBM VMX SIMD instructions")
414 elseif(GMX_SIMD STREQUAL "IBM_VSX")
416 prepare_power_vsx_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
420 int main(){vector double x,y=vec_splats(1.0);x=vec_madd(y,y,y);return vec_all_ge(y,x);}"
421 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
422 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
423 "-mvsx" "-maltivec -mabi=altivec" "-qarch=auto -qaltivec")
425 # Usually we check also for the C compiler here, but a C compiler
426 # is not required for SIMD support on this platform. cmake through
427 # at least version 3.7 cannot pass this check with the C compiler
428 # in the latest xlc 13.1.5, but the C++ compiler has different
429 # behaviour and is OK. See Redmine #2102.
430 if(NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
431 gmx_give_fatal_error_when_simd_support_not_found("IBM VSX" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
434 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
435 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
436 set(GMX_SIMD_${GMX_SIMD} 1)
437 set(SIMD_STATUS_MESSAGE "Enabling IBM VSX SIMD instructions")
439 elseif(GMX_SIMD STREQUAL "SPARC64_HPC_ACE")
441 # Note that GMX_RELAXED_DOUBLE_PRECISION is enabled by default in the top-level CMakeLists.txt
443 set(GMX_SIMD_${GMX_SIMD} 1)
444 set(SIMD_STATUS_MESSAGE "Enabling Sparc64 HPC-ACE SIMD instructions")
446 elseif(GMX_SIMD STREQUAL "REFERENCE")
448 # NB: This file handles settings for the SIMD module, so in the interest
449 # of proper modularization, please do NOT put any verlet kernel settings in this file.
451 if(GMX_SIMD_REF_FLOAT_WIDTH)
452 add_definitions(-DGMX_SIMD_REF_FLOAT_WIDTH=${GMX_SIMD_REF_FLOAT_WIDTH})
454 if(GMX_SIMD_REF_DOUBLE_WIDTH)
455 add_definitions(-DGMX_SIMD_REF_DOUBLE_WIDTH=${GMX_SIMD_REF_DOUBLE_WIDTH})
458 set(GMX_SIMD_${GMX_SIMD} 1)
459 set(SIMD_STATUS_MESSAGE "Enabling reference (emulated) SIMD instructions.")
462 gmx_invalid_option_value(GMX_SIMD)
466 gmx_check_if_changed(SIMD_CHANGED GMX_SIMD)
467 if (SIMD_CHANGED AND DEFINED SIMD_STATUS_MESSAGE)
468 message(STATUS "${SIMD_STATUS_MESSAGE}")
471 # By default, 32-bit windows cannot pass SIMD (SSE/AVX) arguments in registers,
472 # and even on 64-bit (all platforms) it is only used for a handful of arguments.
473 # The __vectorcall (MSVC, from MSVC2013) or __regcall (ICC) calling conventions
474 # enable this, which is critical to enable 32-bit SIMD and improves performance
476 # Check if the compiler supports one of these, and in that case set gmx_simdcall
477 # to that string. If we do not have any such calling convention modifier, set it
478 # to an empty string.
480 # Update 2015-11-04: As of version 3.6, clang has added support for __vectorcall
481 # (also on Linux). This appears to be buggy for the reference SIMD
482 # implementation when using the Debug build (when functions are not inlined)
483 # while it seems works fine for the actual SIMD implementations. This is likely
484 # because the reference build ends up passing lots of structures with arrays
485 # rather than actual vector data. For now we disable __vectorcall with clang
486 # when using the reference build.
488 # xlc 13.1.5 does not seem recognize any attribute, and warns about invalid ones
489 # so we avoid searching for any.
491 if(NOT DEFINED GMX_SIMD_CALLING_CONVENTION)
493 set(CALLCONV_LIST " ")
494 elseif(CMAKE_CXX_COMPILER_ID MATCHES "Clang" AND GMX_SIMD STREQUAL "REFERENCE")
495 set(CALLCONV_LIST __regcall " ")
496 elseif(CMAKE_CXX_COMPILER_ID MATCHES "XL")
497 set(CALLCONV_LIST " ")
499 set(CALLCONV_LIST __vectorcall __regcall " ")
501 foreach(callconv ${CALLCONV_LIST})
502 set(callconv_compile_var "_callconv_${callconv}")
503 check_c_source_compiles("int ${callconv} f(int i) {return i;} int main(void) {return f(0);}" ${callconv_compile_var})
504 if(${callconv_compile_var})
505 set(GMX_SIMD_CALLING_CONVENTION "${callconv}" CACHE INTERNAL "Calling convention for SIMD routines" FORCE)