include/gmx_cpuid.h

   1 /*
   2  * This file is part of the GROMACS molecular simulation package.
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   5  * David van der Spoel, Berk Hess, Erik Lindahl, and including many
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  35 #ifndef GMX_CPUID_H_
  36 #define GMX_CPUID_H_
  37
  38 #include <stdio.h>
  39
  40 #include "visibility.h"
  41
  42 #ifdef __cplusplus
  43 extern "C" {
  44 #endif
  45 #if 0
  46 } /* fixes auto-indentation problems */
  47 #endif
  48
  49
  50 /* Currently identifiable CPU Vendors */
  51 enum gmx_cpuid_vendor
  52 {
  53     GMX_CPUID_VENDOR_CANNOTDETECT,   /* Should only be used if something fails */
  54     GMX_CPUID_VENDOR_UNKNOWN,
  55     GMX_CPUID_VENDOR_INTEL,
  56     GMX_CPUID_VENDOR_AMD,
  57     GMX_CPUID_NVENDORS
  58 };
  59
  60
  61 /* CPU feature/property list, to be used as indices into the feature array of the
  62  * gmxcpuid_t data structure.
  63  *
  64  * To facilitate looking things up, we keep this list alphabetical.
  65  * The list is NOT exhaustive - we have basically added stuff that might be
  66  * useful in an application like Gromacs.
  67  *
  68  * AMD and Intel tend to share most architectural elements, and even if the
  69  * flags might have to be detected in different ways (different cpuid registers),
  70  * once the flag is present the functions should be identical. Unfortunately the
  71  * trend right now (2012) seems to be that they are diverging. This means that
  72  * we need to use specific flags to the compiler to maximize performance, and
  73  * then the binaries might not be portable between Intel and AMD as they were
  74  * before when we only needed to check for SSE and/or SSE2 support in Gromacs.
  75  */
  76 enum gmx_cpuid_feature
  77 {
  78     GMX_CPUID_FEATURE_CANNOTDETECT,      /* Flag set if we could not detect on this CPU  */
  79     GMX_CPUID_FEATURE_X86_AES,           /* x86 advanced encryption standard accel.      */
  80     GMX_CPUID_FEATURE_X86_APIC,          /* APIC support                                 */
  81     GMX_CPUID_FEATURE_X86_AVX,           /* Advanced vector extensions                   */
  82     GMX_CPUID_FEATURE_X86_AVX2,          /* AVX2 including gather support (not used yet) */
  83     GMX_CPUID_FEATURE_X86_CLFSH,         /* Supports CLFLUSH instruction                 */
  84     GMX_CPUID_FEATURE_X86_CMOV,          /* Conditional move insn support                */
  85     GMX_CPUID_FEATURE_X86_CX8,           /* Supports CMPXCHG8B (8-byte compare-exchange) */
  86     GMX_CPUID_FEATURE_X86_CX16,          /* Supports CMPXCHG16B (16-byte compare-exchg)  */
  87     GMX_CPUID_FEATURE_X86_F16C,          /* Supports 16-bit FP conversion instructions   */
  88     GMX_CPUID_FEATURE_X86_FMA,           /* Fused-multiply add support (mainly for AVX)  */
  89     GMX_CPUID_FEATURE_X86_FMA4,          /* 4-operand FMA, only on AMD for now           */
  90     GMX_CPUID_FEATURE_X86_HTT,           /* Hyper-Threading supported                    */
  91     GMX_CPUID_FEATURE_X86_LAHF_LM,       /* LAHF/SAHF support in 64 bits                 */
  92     GMX_CPUID_FEATURE_X86_MISALIGNSSE,   /* Support for misaligned SSE data instructions */
  93     GMX_CPUID_FEATURE_X86_MMX,           /* MMX registers and instructions               */
  94     GMX_CPUID_FEATURE_X86_MSR,           /* Supports Intel model-specific-registers      */
  95     GMX_CPUID_FEATURE_X86_NONSTOP_TSC,   /* Invariant TSC (constant rate in ACPI states) */
  96     GMX_CPUID_FEATURE_X86_PCID,          /* Process context identifier support           */
  97     GMX_CPUID_FEATURE_X86_PCLMULDQ,      /* Carry-less 64-bit multiplication supported   */
  98     GMX_CPUID_FEATURE_X86_PDCM,          /* Perfmon and Debug Capability                 */
  99     GMX_CPUID_FEATURE_X86_PDPE1GB,       /* Support for 1GB pages                        */
 100     GMX_CPUID_FEATURE_X86_POPCNT,        /* Supports the POPCNT (population count) insn  */
 101     GMX_CPUID_FEATURE_X86_PSE,           /* Supports 4MB-pages (page size extension)     */
 102     GMX_CPUID_FEATURE_X86_RDRND,         /* RDRAND high-quality hardware random numbers  */
 103     GMX_CPUID_FEATURE_X86_RDTSCP,        /* Serializing rdtscp instruction available     */
 104     GMX_CPUID_FEATURE_X86_SSE2,          /* SSE 2                                        */
 105     GMX_CPUID_FEATURE_X86_SSE3,          /* SSE 3                                        */
 106     GMX_CPUID_FEATURE_X86_SSE4A,         /* SSE 4A                                       */
 107     GMX_CPUID_FEATURE_X86_SSE4_1,        /* SSE 4.1                                      */
 108     GMX_CPUID_FEATURE_X86_SSE4_2,        /* SSE 4.2                                      */
 109     GMX_CPUID_FEATURE_X86_SSSE3,         /* Supplemental SSE3                            */
 110     GMX_CPUID_FEATURE_X86_TDT,           /* TSC deadline timer                           */
 111     GMX_CPUID_FEATURE_X86_X2APIC,        /* Extended xAPIC Support                       */
 112     GMX_CPUID_FEATURE_X86_XOP,           /* AMD extended instructions, only AMD for now  */
 113     GMX_CPUID_NFEATURES
 114 };
 115
 116
 117 /* Currently supported acceleration instruction sets, intrinsics or other similar combinations
 118  * in Gromacs. There is not always a 1-to-1 correspondence with feature flags; on some AMD
 119  * hardware we prefer to use 128bit AVX instructions (although 256-bit ones could be executed),
 120  * and we still haven't written the AVX2 kernels.
 121  */
 122 enum gmx_cpuid_acceleration
 123 {
 124     GMX_CPUID_ACCELERATION_CANNOTDETECT,    /* Should only be used if something fails */
 125     GMX_CPUID_ACCELERATION_NONE,
 126     GMX_CPUID_ACCELERATION_X86_SSE2,
 127     GMX_CPUID_ACCELERATION_X86_SSE4_1,
 128     GMX_CPUID_ACCELERATION_X86_AVX_128_FMA,
 129     GMX_CPUID_ACCELERATION_X86_AVX_256,
 130     GMX_CPUID_NACCELERATIONS
 131 };
 132
 133 /* Text strings corresponding to CPU vendors */
 134 GMX_LIBGMX_EXPORT
 135 extern const char *
 136 gmx_cpuid_vendor_string[GMX_CPUID_NVENDORS];
 137
 138 /* Text strings for CPU feature indices */
 139 extern const char *
 140 gmx_cpuid_feature_string[GMX_CPUID_NFEATURES];
 141
 142 /* Text strings for Gromacs acceleration/instruction sets */
 143 extern const char *
 144 gmx_cpuid_acceleration_string[GMX_CPUID_NACCELERATIONS];
 145
 146
 147 /* Abstract data type with CPU detection information. Set by gmx_cpuid_init(). */
 148 typedef struct gmx_cpuid *
 149 gmx_cpuid_t;
 150
 151
 152 /* Fill the data structure by using CPU detection instructions.
 153  * Return 0 on success, 1 if something bad happened.
 154  */
 155 int
 156 gmx_cpuid_init              (gmx_cpuid_t *              cpuid);
 157
 158
 159 /* Return the vendor id as enumerated type. Use gmx_cpuid_vendor_string[]
 160  * to get the corresponding text string.
 161  */
 162 GMX_LIBGMX_EXPORT
 163 enum gmx_cpuid_vendor
 164 gmx_cpuid_vendor            (gmx_cpuid_t                cpuid);
 165
 166
 167 /* Return a constant pointer to the processor brand string. */
 168 const char *
 169 gmx_cpuid_brand             (gmx_cpuid_t                cpuid);
 170
 171
 172 /* Return processor family version. For a chip of version 1.2.3, this is 1 */
 173 GMX_LIBGMX_EXPORT
 174 int
 175 gmx_cpuid_family            (gmx_cpuid_t                cpuid);
 176
 177 /* Return processor model version, For a chip of version 1.2.3, this is 2. */
 178 GMX_LIBGMX_EXPORT
 179 int
 180 gmx_cpuid_model             (gmx_cpuid_t                cpuid);
 181
 182 /* Return processor stepping version, For a chip of version 1.2.3, this is 3. */
 183 int
 184 gmx_cpuid_stepping          (gmx_cpuid_t                cpuid);
 185
 186
 187 /* Check whether a particular CPUID feature is set.
 188  * Returns 0 if flag "feature" is not set, 1 if the flag is set. We cannot use
 189  * gmx_bool here since this file must be possible to compile without simple.h.
 190  */
 191 GMX_LIBGMX_EXPORT
 192 int
 193 gmx_cpuid_feature           (gmx_cpuid_t                cpuid,
 194                              enum gmx_cpuid_feature     feature);
 195
 196
 197 /* Return pointers to cpu topology information.
 198  *
 199  * Important: CPU topology requires more OS support than most other
 200  * functions in this file, including support for thread pinning to hardware.
 201  * This means it will not work on some platforms, including e.g. Mac OS X.
 202  * Thus, it is IMPERATIVE that you check the return value from this routine
 203  * before doing anything with the information. It is only if the return
 204  * value is zero that the data is valid.
 205  *
 206  * For the returned values we have:
 207  * - nprocessors         Total number of logical processors reported by OS
 208  * - npackages           Usually number of CPU sockets
 209  * - ncores_per_package  Number of cores in each package
 210  * - nhwthreads_per_core Number of hardware threads per core; 2 for hyperthreading.
 211  * - package_id          Array with the package index for each logical cpu
 212  * - core_id             Array with local core index for each logical cpu
 213  * - hwthread_id         Array with local hwthread index for each logical cpu
 214  * - locality_order      Array with logical cpu numbers, sorted in order
 215  *                       of physical and logical locality in the system.
 216  *
 217  * All arrays are of length nprocessors.
 218  */
 219 GMX_LIBGMX_EXPORT
 220 int
 221 gmx_cpuid_topology(gmx_cpuid_t        cpuid,
 222                    int *              nprocessors,
 223                    int *              npackages,
 224                    int *              ncores_per_package,
 225                    int *              nhwthreads_per_core,
 226                    const int **       package_id,
 227                    const int **       core_id,
 228                    const int **       hwthread_id,
 229                    const int **       locality_order);
 230
 231 /* Enumerated values for x86 SMT enabled-status. Note that this does not refer
 232  * to Hyper-Threading support (that is the flag GMX_CPUID_FEATURE_X86_HTT), but
 233  * whether Hyper-Threading is _enabled_ and _used_ in bios right now.
 234  */
 235 enum gmx_cpuid_x86_smt
 236 {
 237     GMX_CPUID_X86_SMT_CANNOTDETECT,
 238     GMX_CPUID_X86_SMT_DISABLED,
 239     GMX_CPUID_X86_SMT_ENABLED
 240 };
 241
 242 /* Returns the status of x86 SMT support. IMPORTANT: There are non-zero
 243  * return values for this routine that still do not indicate supported and
 244  * enabled smt/Hyper-Threading. You need to carefully check the return value
 245  * against the enumerated type values to see what you are getting.
 246  *
 247  * Long-term, this functionality will move to a new hardware topology detection
 248  * layer, but that will require a lot of new code and a working interface to the
 249  * hwloc library. Surprisingly, there is no simple way to find out that
 250  * Hyper-Threading is actually turned on without fully enumerating and checking
 251  * all the cores, which we presently can only do on Linux. This means a couple
 252  * of things:
 253  *
 254  * 1) If you want to know whether your CPU _supports_ Hyper-Threading in the
 255  *    first place, check the GMX_CPUID_FEATURE_X86_HTT flag instead!
 256  * 2) There are several scenarios where this routine will say that it cannot
 257  *    detect whether SMT is enabled and used right now.
 258  * 3) If you need support on non-Linux x86, you have to write it :-)
 259  * 4) Don't invest too much efforts, since this will be replaced with
 260  *    full hardware topology detection in the future.
 261  * 5) Don't worry if the detection does not work. It is not a catastrophe, but
 262  *    but we get slightly better performance on x86 if we use Hyper-Threading
 263  *    cores in direct space, but not reciprocal space.
 264  *
 265  * Since this routine presently only supports Hyper-Threading we say X86_SMT
 266  * in order not to give the impression we can detect any SMT. We haven't
 267  * even tested the performance on other SMT implementations, so it is not
 268  * obvious we shouldn't use SMT there.
 269  *
 270  * Note that you can get more complete topology information from
 271  * gmx_cpuid_topology(), although that requires slightly more OS support.
 272  */
 273 GMX_LIBGMX_EXPORT
 274 enum gmx_cpuid_x86_smt
 275 gmx_cpuid_x86_smt(gmx_cpuid_t cpuid);
 276
 277
 278 /* Formats a text string (up to n characters) from the data structure.
 279  * The output will have max 80 chars between newline characters.
 280  */
 281 int
 282 gmx_cpuid_formatstring      (gmx_cpuid_t                cpuid,
 283                              char *                     s,
 284                              int                        n);
 285
 286
 287 /* Suggests a suitable gromacs acceleration based on the support in the
 288  * hardware.
 289  */
 290 enum gmx_cpuid_acceleration
 291 gmx_cpuid_acceleration_suggest  (gmx_cpuid_t                    cpuid);
 292
 293
 294 /* Check if this binary was compiled with the same acceleration as we
 295  * would suggest for the current hardware. Always print stats to the log file
 296  * if it is non-NULL, and print a warning in stdout if we don't have a match.
 297  */
 298 int
 299 gmx_cpuid_acceleration_check    (gmx_cpuid_t                cpuid,
 300                                  FILE *                     log);
 301
 302
 303 /* Release resources used by data structure. Note that the pointer to the
 304  * CPU brand string will no longer be valid once this routine has been called.
 305  */
 306 void
 307 gmx_cpuid_done              (gmx_cpuid_t                cpuid);
 308
 309
 310
 311
 312 #ifdef __cplusplus
 313 }
 314 #endif
 315
 316
 317 #endif /* GMX_CPUID_H_ */