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38 # Issue a fatal error with an appropriate message, when the toolchain
39 # was not able to compile code for SIMD support.
42 # SIMD_STRING A string describing the kind of SIMD support that didn't work.
43 # ALTERNATIVE_SUGGESTION A string describing anything the user could try other than getting a new compiler.
44 # SUGGEST_BINUTILS_UPDATE True when there's information that the compiler was OK, but something else was not.
45 function(gmx_give_fatal_error_when_simd_support_not_found SIMD_STRING ALTERNATIVE_SUGGESTION SUGGEST_BINUTILS_UPDATE)
46 if(SUGGEST_BINUTILS_UPDATE)
47 set(_msg "Found a compiler flag for ${SIMD_STRING} support, but some other problem exists. Update your assembler and/or linker, e.g. in the binutils package of your distribution.")
49 set(_msg "Cannot find ${SIMD_STRING} compiler flag. Use a newer compiler, or ${ALTERNATIVE_SUGGESTION}.")
51 message(FATAL_ERROR ${_msg})
54 macro(gmx_manage_simd)
56 set(GMX_SIMD_ACCURACY_BITS_SINGLE 22 CACHE STRING "Target mantissa bits for SIMD single math")
58 # Note that we typically restrict double precision target accuracy to be twice that
59 # of single. This means we only need one more N-R iteration for 1/sqrt(x) and 1(x),
60 # and the first iteration can sometimes be done as a pair in single precision. This should
61 # be plenty enough for Molecular Dynamics applications. Many of our double precision math
62 # functions still achieve very close to full double precision, but we do not guarantee that
63 # they will be able to achieve higher accuracy if you set this beyond 44 bits. GROMACS will
64 # work - but some unit tests might fail.
66 set(GMX_SIMD_ACCURACY_BITS_DOUBLE 44 CACHE STRING "Target mantissa bits for SIMD double math")
67 mark_as_advanced(GMX_SIMD_ACCURACY_BITS_SINGLE)
68 mark_as_advanced(GMX_SIMD_ACCURACY_BITS_DOUBLE)
70 if(${GMX_SIMD_ACCURACY_BITS_SINGLE} GREATER 22)
71 message(STATUS "Note: Full mantissa accuracy (including least significant bit) requested for SIMD single math. Presently we cannot get the least significant bit correct since that would require different algorithms - reducing to 22 bits.")
72 set(GMX_SIMD_ACCURACY_BITS_SINGLE 22 CACHE STRING "Target mantissa bits for SIMD single math" FORCE)
75 if(${GMX_SIMD_ACCURACY_BITS_DOUBLE} GREATER 51)
76 message(STATUS "Note: Full mantissa accuracy (including least significant bit) requested for SIMD double math. Presently we cannot get the least significant bit correct since that would require different algorithms - reducing to 51 bits.")
77 set(GMX_SIMD_ACCURACY_BITS_DOUBLE 51 CACHE STRING "Target mantissa bits for SIMD double math" FORCE)
81 # Section to set (and test) compiler flags for SIMD.
83 # If the user chose the (default) automatic behaviour, then detection
84 # is run to suggest a SIMD choice suitable for the build
85 # host. Otherwise, the users's choice is always honoured. The compiler
86 # flags will be set based on that choice.
89 set(GMX_SIMD_ACTIVE ${GMX_SIMD})
90 if(GMX_SIMD STREQUAL "AUTO")
91 include(gmxDetectSimd)
92 gmx_detect_simd(GMX_SUGGESTED_SIMD)
93 set(GMX_SIMD_ACTIVE ${GMX_SUGGESTED_SIMD})
96 if(GMX_SIMD_ACTIVE STREQUAL "NONE")
97 # nothing to do configuration-wise
98 set(SIMD_STATUS_MESSAGE "SIMD instructions disabled")
99 elseif(GMX_SIMD_ACTIVE STREQUAL "SSE2")
101 gmx_find_simd_sse2_flags(SIMD_SSE2_C_SUPPORTED SIMD_SSE2_CXX_SUPPORTED
102 SIMD_SSE2_C_FLAGS SIMD_SSE2_CXX_FLAGS)
104 if(NOT SIMD_SSE2_C_SUPPORTED OR NOT SIMD_SSE2_CXX_SUPPORTED)
105 gmx_give_fatal_error_when_simd_support_not_found("SSE2" "disable SIMD support (slow)" "${SUGGEST_BINUTILS_UPDATE}")
108 # If multiple flags are neeed, make them into a list
109 string(REPLACE " " ";" SIMD_C_FLAGS ${SIMD_SSE2_C_FLAGS})
110 string(REPLACE " " ";" SIMD_CXX_FLAGS ${SIMD_SSE2_CXX_FLAGS})
111 set(GMX_SIMD_X86_${GMX_SIMD_ACTIVE} 1)
112 set(SIMD_STATUS_MESSAGE "Enabling SSE2 SIMD instructions using CXX flags: ${SIMD_SSE2_CXX_FLAGS}")
114 elseif(GMX_SIMD_ACTIVE STREQUAL "SSE4.1")
116 gmx_find_simd_sse4_1_flags(SIMD_SSE4_1_C_SUPPORTED SIMD_SSE4_1_CXX_SUPPORTED
117 SIMD_SSE4_1_C_FLAGS SIMD_SSE4_1_CXX_FLAGS)
119 if(NOT SIMD_SSE4_1_C_SUPPORTED OR NOT SIMD_SSE4_1_CXX_SUPPORTED)
120 gmx_give_fatal_error_when_simd_support_not_found("SSE4.1" "choose SSE2 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
123 # If multiple flags are neeed, make them into a list
124 string(REPLACE " " ";" SIMD_C_FLAGS ${SIMD_SSE4_1_C_FLAGS})
125 string(REPLACE " " ";" SIMD_CXX_FLAGS ${SIMD_SSE4_1_CXX_FLAGS})
126 set(GMX_SIMD_X86_SSE4_1 1)
127 set(SIMD_STATUS_MESSAGE "Enabling SSE4.1 SIMD instructions using CXX flags: ${SIMD_SSE4_1_CXX_FLAGS}")
129 elseif(GMX_SIMD_ACTIVE STREQUAL "AVX_128_FMA")
131 gmx_find_simd_avx_128_fma_flags(SIMD_AVX_128_FMA_C_SUPPORTED SIMD_AVX_128_FMA_CXX_SUPPORTED
132 SIMD_AVX_128_FMA_C_FLAGS SIMD_AVX_128_FMA_CXX_FLAGS)
134 if(NOT SIMD_AVX_128_FMA_C_SUPPORTED OR NOT SIMD_AVX_128_FMA_CXX_SUPPORTED)
135 gmx_give_fatal_error_when_simd_support_not_found("128-bit AVX with FMA support" "choose SSE4.1 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
138 # If multiple flags are neeed, make them into a list
139 string(REPLACE " " ";" SIMD_C_FLAGS ${SIMD_AVX_128_FMA_C_FLAGS})
140 string(REPLACE " " ";" SIMD_CXX_FLAGS ${SIMD_AVX_128_FMA_CXX_FLAGS})
141 set(GMX_SIMD_X86_${GMX_SIMD_ACTIVE} 1)
142 set(SIMD_STATUS_MESSAGE "Enabling 128-bit AMD FMA SIMD instructions using CXX flags: ${SIMD_AVX_128_FMA_CXX_FLAGS}")
144 elseif(GMX_SIMD_ACTIVE STREQUAL "AVX_256")
146 gmx_find_simd_avx_flags(SIMD_AVX_C_SUPPORTED SIMD_AVX_CXX_SUPPORTED
147 SIMD_AVX_C_FLAGS SIMD_AVX_CXX_FLAGS)
149 if(NOT SIMD_AVX_C_SUPPORTED OR NOT SIMD_AVX_CXX_SUPPORTED)
150 gmx_give_fatal_error_when_simd_support_not_found("AVX" "choose SSE4.1 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
153 # If multiple flags are neeed, make them into a list
154 string(REPLACE " " ";" SIMD_C_FLAGS ${SIMD_AVX_C_FLAGS})
155 string(REPLACE " " ";" SIMD_CXX_FLAGS ${SIMD_AVX_CXX_FLAGS})
156 set(GMX_SIMD_X86_${GMX_SIMD_ACTIVE} 1)
157 set(SIMD_STATUS_MESSAGE "Enabling 256-bit AVX SIMD instructions using CXX flags: ${SIMD_AVX_CXX_FLAGS}")
159 elseif(GMX_SIMD_ACTIVE MATCHES "AVX2_")
161 gmx_find_simd_avx2_flags(SIMD_AVX2_C_SUPPORTED SIMD_AVX2_CXX_SUPPORTED
162 SIMD_AVX2_C_FLAGS SIMD_AVX2_CXX_FLAGS)
164 if(NOT SIMD_AVX2_C_SUPPORTED OR NOT SIMD_AVX2_CXX_SUPPORTED)
165 gmx_give_fatal_error_when_simd_support_not_found("AVX2" "choose AVX SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
168 # If multiple flags are neeed, make them into a list
169 string(REPLACE " " ";" SIMD_C_FLAGS ${SIMD_AVX2_C_FLAGS})
170 string(REPLACE " " ";" SIMD_CXX_FLAGS ${SIMD_AVX2_CXX_FLAGS})
171 set(GMX_SIMD_X86_${GMX_SIMD_ACTIVE} 1)
173 if(GMX_SIMD_ACTIVE STREQUAL "AVX2_128")
174 set(SIMD_STATUS_MESSAGE "Enabling 128-bit AVX2 SIMD instructions using CXX flags: ${SIMD_AVX2_CXX_FLAGS}")
176 set(SIMD_STATUS_MESSAGE "Enabling 256-bit AVX2 SIMD instructions using CXX flags: ${SIMD_AVX2_CXX_FLAGS}")
179 elseif(GMX_SIMD_ACTIVE STREQUAL "MIC")
181 # No flags needed. Not testing.
182 set(GMX_SIMD_X86_MIC 1)
183 set(SIMD_STATUS_MESSAGE "Enabling MIC (Xeon Phi) SIMD instructions without special flags.")
185 elseif(GMX_SIMD_ACTIVE STREQUAL "AVX_512")
187 gmx_find_simd_avx_512_flags(SIMD_AVX_512_C_SUPPORTED SIMD_AVX_512_CXX_SUPPORTED
188 SIMD_AVX_512_C_FLAGS SIMD_AVX_512_CXX_FLAGS)
190 if(NOT SIMD_AVX_512_C_SUPPORTED OR NOT SIMD_AVX_512_CXX_SUPPORTED)
191 gmx_give_fatal_error_when_simd_support_not_found("AVX 512F" "choose a lower level of SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
194 # If multiple flags are neeed, make them into a list
195 string(REPLACE " " ";" SIMD_C_FLAGS ${SIMD_AVX_512_C_FLAGS})
196 string(REPLACE " " ";" SIMD_CXX_FLAGS ${SIMD_AVX_512_CXX_FLAGS})
197 set(GMX_SIMD_X86_${GMX_SIMD_ACTIVE} 1)
198 set(SIMD_STATUS_MESSAGE "Enabling 512-bit AVX-512 SIMD instructions using CXX flags: ${SIMD_AVX_512_CXX_FLAGS}")
200 elseif(GMX_SIMD_ACTIVE STREQUAL "AVX_512_KNL")
202 gmx_find_simd_avx_512_knl_flags(SIMD_AVX_512_KNL_C_SUPPORTED SIMD_AVX_512_KNL_CXX_SUPPORTED
203 SIMD_AVX_512_KNL_C_FLAGS SIMD_AVX_512_KNL_CXX_FLAGS)
205 if(NOT SIMD_AVX_512_KNL_C_SUPPORTED OR NOT SIMD_AVX_512_KNL_CXX_SUPPORTED)
206 gmx_give_fatal_error_when_simd_support_not_found("AVX 512ER" "choose a lower level of SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
209 # If multiple flags are neeed, make them into a list
210 string(REPLACE " " ";" SIMD_C_FLAGS ${SIMD_AVX_512_KNL_C_FLAGS})
211 string(REPLACE " " ";" SIMD_CXX_FLAGS ${SIMD_AVX_512_KNL_CXX_FLAGS})
212 set(GMX_SIMD_X86_${GMX_SIMD_ACTIVE} 1)
213 set(SIMD_STATUS_MESSAGE "Enabling 512-bit AVX-512-KNL SIMD instructions using CXX flags: ${SIMD_AVX_512_KNL_CXX_FLAGS}")
215 elseif(GMX_SIMD_ACTIVE STREQUAL "ARM_NEON")
218 message(FATAL_ERROR "ARM_NEON SIMD support is not available for a double precision build because the architecture lacks double-precision support")
221 gmx_find_simd_arm_neon_flags(SIMD_ARM_NEON_C_SUPPORTED SIMD_ARM_NEON_CXX_SUPPORTED
222 SIMD_ARM_NEON_C_FLAGS SIMD_ARM_NEON_CXX_FLAGS)
224 if(NOT SIMD_ARM_NEON_C_SUPPORTED OR NOT SIMD_ARM_NEON_CXX_SUPPORTED)
225 gmx_give_fatal_error_when_simd_support_not_found("ARM NEON" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
228 # If multiple flags are neeed, make them into a list
229 string(REPLACE " " ";" SIMD_C_FLAGS ${SIMD_ARM_NEON_C_FLAGS})
230 string(REPLACE " " ";" SIMD_CXX_FLAGS ${SIMD_ARM_NEON_CXX_FLAGS})
231 set(GMX_SIMD_${GMX_SIMD_ACTIVE} 1)
232 set(SIMD_STATUS_MESSAGE "Enabling 32-bit ARM NEON SIMD instructions using CXX flags: ${SIMD_ARM_NEON_CXX_FLAGS}")
234 elseif(GMX_SIMD_ACTIVE STREQUAL "ARM_NEON_ASIMD")
236 gmx_find_simd_arm_neon_asimd_flags(SIMD_ARM_NEON_ASIMD_C_SUPPORTED SIMD_ARM_NEON_ASIMD_CXX_SUPPORTED
237 SIMD_ARM_NEON_ASIMD_C_FLAGS SIMD_ARM_NEON_ASIMD_CXX_FLAGS)
239 if(NOT SIMD_ARM_NEON_ASIMD_C_SUPPORTED OR NOT SIMD_ARM_NEON_ASIMD_CXX_SUPPORTED)
240 gmx_give_fatal_error_when_simd_support_not_found("ARM (AArch64) NEON Advanced SIMD" "particularly gcc version 4.9 or later, or disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
243 # If multiple flags are neeed, make them into a list
244 string(REPLACE " " ";" SIMD_C_FLAGS ${SIMD_ARM_NEON_ASIMD_C_FLAGS})
245 string(REPLACE " " ";" SIMD_CXX_FLAGS ${SIMD_ARM_NEON_ASIMD_CXX_FLAGS})
246 set(GMX_SIMD_${GMX_SIMD_ACTIVE} 1)
247 set(SIMD_STATUS_MESSAGE "Enabling ARM (AArch64) NEON Advanced SIMD instructions using CXX flags: ${SIMD_ARM_NEON_ASIMD_CXX_FLAGS}")
249 elseif(GMX_SIMD_ACTIVE STREQUAL "IBM_VMX")
251 gmx_find_simd_ibm_vmx_flags(SIMD_IBM_VMX_C_SUPPORTED SIMD_IBM_VMX_CXX_SUPPORTED
252 SIMD_IBM_VMX_C_FLAGS SIMD_IBM_VMX_CXX_FLAGS)
254 if(NOT SIMD_IBM_VMX_C_SUPPORTED OR NOT SIMD_IBM_VMX_CXX_SUPPORTED)
255 gmx_give_fatal_error_when_simd_support_not_found("IBM VMX" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
258 # If multiple flags are neeed, make them into a list
259 string(REPLACE " " ";" SIMD_C_FLAGS ${SIMD_IBM_VMX_C_FLAGS})
260 string(REPLACE " " ";" SIMD_CXX_FLAGS ${SIMD_IBM_VMX_CXX_FLAGS})
261 set(GMX_SIMD_${GMX_SIMD_ACTIVE} 1)
262 set(SIMD_STATUS_MESSAGE "Enabling IBM VMX SIMD instructions using CXX flags: ${SIMD_IBM_VMX_CXX_FLAGS}")
264 elseif(GMX_SIMD_ACTIVE STREQUAL "IBM_VSX")
266 gmx_find_simd_ibm_vsx_flags(SIMD_IBM_VSX_C_SUPPORTED SIMD_IBM_VSX_CXX_SUPPORTED
267 SIMD_IBM_VSX_C_FLAGS SIMD_IBM_VSX_CXX_FLAGS)
269 # Usually we check also for the C compiler here, but a C compiler
270 # is not required for SIMD support on this platform. cmake through
271 # at least version 3.7 cannot pass this check with the C compiler
272 # in the latest xlc 13.1.5, but the C++ compiler has different
273 # behaviour and is OK. See Redmine #2102.
274 if(NOT SIMD_IBM_VSX_CXX_SUPPORTED)
275 gmx_give_fatal_error_when_simd_support_not_found("IBM VSX" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
278 # If multiple flags are neeed, make them into a list
279 string(REPLACE " " ";" SIMD_C_FLAGS ${SIMD_IBM_VSX_C_FLAGS})
280 string(REPLACE " " ";" SIMD_CXX_FLAGS ${SIMD_IBM_VSX_CXX_FLAGS})
281 set(GMX_SIMD_${GMX_SIMD_ACTIVE} 1)
282 set(SIMD_STATUS_MESSAGE "Enabling IBM VSX SIMD instructions using CXX flags: ${SIMD_IBM_VSX_CXX_FLAGS}")
284 elseif(GMX_SIMD_ACTIVE STREQUAL "SPARC64_HPC_ACE")
286 # Note that GMX_RELAXED_DOUBLE_PRECISION is enabled by default in the top-level CMakeLists.txt
288 set(GMX_SIMD_${GMX_SIMD_ACTIVE} 1)
289 set(SIMD_STATUS_MESSAGE "Enabling Sparc64 HPC-ACE SIMD instructions without special flags.")
291 elseif(GMX_SIMD_ACTIVE STREQUAL "REFERENCE")
293 # NB: This file handles settings for the SIMD module, so in the interest
294 # of proper modularization, please do NOT put any verlet kernel settings in this file.
296 if(GMX_SIMD_REF_FLOAT_WIDTH)
297 add_definitions(-DGMX_SIMD_REF_FLOAT_WIDTH=${GMX_SIMD_REF_FLOAT_WIDTH})
299 if(GMX_SIMD_REF_DOUBLE_WIDTH)
300 add_definitions(-DGMX_SIMD_REF_DOUBLE_WIDTH=${GMX_SIMD_REF_DOUBLE_WIDTH})
303 set(GMX_SIMD_${GMX_SIMD_ACTIVE} 1)
304 set(SIMD_STATUS_MESSAGE "Enabling reference (emulated) SIMD instructions without special flags.")
307 gmx_invalid_option_value(GMX_SIMD_ACTIVE)
311 gmx_check_if_changed(SIMD_CHANGED GMX_SIMD_ACTIVE)
312 if (SIMD_CHANGED AND DEFINED SIMD_STATUS_MESSAGE)
313 message(STATUS "${SIMD_STATUS_MESSAGE}")
316 # While AVX-512 is a more recent SIMD ISA than AVX2, some Intel CPUs only have
317 # a single AVX-512 FMA unit, but two AVX2 FMA units, and then it is better to
318 # use AVX2. The only way to test this is to execute a small timing loop.
319 # To be able to recommend the user whether s/he should try AVX-512 instead of
320 # AVX2, we need to compile a single file with AVX512 flags. We do this
321 # automatically, but this option provides a way to turn it off in case it
322 # breaks something. The actual test source file is built if
323 # SIMD_AVX_512_CXX_SUPPORTED is set, so it will always be included if we have
325 set(GMX_ENABLE_AVX512_TESTS ON CACHE BOOL "Compile AVX512 code to test FMA units, even when not using AVX512 SIMD")
326 mark_as_advanced(GMX_ENABLE_AVX512_TESTS)
328 if(GMX_ENABLE_AVX512_TESTS AND
329 (GMX_SIMD_ACTIVE STREQUAL "AVX_256" OR GMX_SIMD_ACTIVE STREQUAL "AVX2_256" OR GMX_SIMD_ACTIVE STREQUAL "AVX2_128"))
330 if(NOT DEFINED SIMD_AVX_512_CXX_SUPPORTED)
331 message(STATUS "Detecting flags to enable runtime detection of AVX-512 units on newer CPUs")
332 set(SIMD_AVX_512_REPORT_STATUS 1)
334 gmx_find_simd_avx_512_flags(SIMD_AVX_512_C_SUPPORTED SIMD_AVX_512_CXX_SUPPORTED
335 SIMD_AVX_512_C_FLAGS SIMD_AVX_512_CXX_FLAGS)
336 if(SIMD_AVX_512_REPORT_STATUS)
337 if(SIMD_AVX_512_CXX_SUPPORTED)
338 message(STATUS "Detecting flags to enable runtime detection of AVX-512 units on newer CPUs - ${SIMD_AVX_512_CXX_FLAGS}")
340 message(STATUS "Detecting flags to enable runtime detection of AVX-512 units on newer CPUs - not supported")
343 # Since we might be overriding AVX2 architecture flags with the AVX512 flags for the
344 # files where it is used, we also check for a flag not to warn about the first (unused) arch.
345 # To avoid spamming the user with lots of gromacs tests we just call the CMake flag test directly.
347 foreach(_testflag "-Wno-unused-command-line-argument" "-wd10121")
348 string(REGEX REPLACE "[^a-zA-Z0-9]+" "_" FLAG_ACCEPTED_VARIABLE "${_testflag}_FLAG_ACCEPTED")
349 check_cxx_compiler_flag("${_testflag}" ${FLAG_ACCEPTED_VARIABLE})
350 if(${FLAG_ACCEPTED_VARIABLE})
351 set(CXX_NO_UNUSED_OPTION_WARNING_FLAGS "${_testflag}")
354 endforeach(_testflag)
358 # By default, 32-bit windows cannot pass SIMD (SSE/AVX) arguments in registers,
359 # and even on 64-bit (all platforms) it is only used for a handful of arguments.
360 # The __vectorcall (MSVC, from MSVC2013) or __regcall (ICC) calling conventions
361 # enable this, which is critical to enable 32-bit SIMD and improves performance
363 # Check if the compiler supports one of these, and in that case set gmx_simdcall
364 # to that string. If we do not have any such calling convention modifier, set it
365 # to an empty string.
367 # Update 2015-11-04: As of version 3.6, clang has added support for __vectorcall
368 # (also on Linux). This appears to be buggy for the reference SIMD
369 # implementation when using the Debug build (when functions are not inlined)
370 # while it seems works fine for the actual SIMD implementations. This is likely
371 # because the reference build ends up passing lots of structures with arrays
372 # rather than actual vector data. For now we disable __vectorcall with clang
373 # when using the reference build.
375 # xlc 13.1.5 does not seem recognize any attribute, and warns about invalid ones
376 # so we avoid searching for any.
378 if(NOT DEFINED GMX_SIMD_CALLING_CONVENTION)
379 if(CMAKE_CXX_COMPILER_ID MATCHES "Clang" AND GMX_SIMD_ACTIVE STREQUAL "REFERENCE")
380 set(CALLCONV_LIST __regcall " ")
381 elseif(CMAKE_CXX_COMPILER_ID MATCHES "XL")
382 set(CALLCONV_LIST " ")
384 set(CALLCONV_LIST __vectorcall __regcall " ")
386 foreach(callconv ${CALLCONV_LIST})
387 set(callconv_compile_var "_callconv_${callconv}")
388 # Some compilers warn about targets for which attributes are
389 # ignored (e.g. clang on ARM), and in such cases we want this
390 # check to lead to using no attribute in subsequent GROMACS
391 # compilation, to avoid issuing the warning for lots of files.
392 check_c_source_compiles("
393 #pragma GCC diagnostic error \"-Wignored-attributes\"
394 int ${callconv} f(int i) {return i;} int main(void) {return f(0);}
395 " ${callconv_compile_var})
396 if(${callconv_compile_var})
397 set(GMX_SIMD_CALLING_CONVENTION_VALUE "${callconv}" CACHE INTERNAL "Calling convention for SIMD routines" FORCE)
401 # If the build is not using SIMD, then we should not manage the
402 # calling convention. Doing so seems to confuse
403 # clang-static-analyzer in at least version 6.0.
404 if(GMX_SIMD_ACTIVE STREQUAL "NONE")
405 set(GMX_SIMD_CALLING_CONVENTION " ")
407 set(GMX_SIMD_CALLING_CONVENTION ${GMX_SIMD_CALLING_CONVENTION_VALUE})
411 if("${CMAKE_CXX_COMPILER_ID}" STREQUAL "GNU")
412 # GCC bug 49001, 54412 on Windows (just warn, since it might be fixed in later versions)
413 if((CMAKE_CXX_COMPILER_VERSION VERSION_LESS "4.9.0" OR CMAKE_SIZEOF_VOID_P EQUAL 8)
414 AND (WIN32 OR CYGWIN)
415 AND (GMX_SIMD_ACTIVE MATCHES "AVX") AND NOT (GMX_SIMD_ACTIVE STREQUAL "AVX_128_FMA"))
416 message(WARNING "GCC on Windows (GCC older than 4.9 in 32-bit mode, or any version in 64-bit mode) with 256-bit AVX will probably crash. You might want to choose a different GMX_SIMD or a different compiler.")
420 string(TOUPPER "${CMAKE_BUILD_TYPE}" _cmake_build_type)
421 if (_cmake_build_type STREQUAL "TSAN" AND NOT (GMX_SIMD_ACTIVE STREQUAL "NONE" OR GMX_SIMD_ACTIVE STREQUAL "REFERENCE" OR GMX_SIMD_ACTIVE MATCHES "AVX_512" OR GMX_SIMD_ACTIVE STREQUAL AVX2_256))
422 message(WARNING "TSAN is only tested with SIMD None, Reference, AVX2_256, and AVX_512. It is known to detect (harmless) memory races with SSE and AVX.")