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35 # include avx test source, used if the AVX flags are set below
36 include(gmxTestAVXMaskload)
37 include(gmxFindFlagsForSource)
39 # Macro that manages setting the respective C and C++ toolchain
40 # variables so that subsequent tests for SIMD support can work.
41 macro(prepare_x86_toolchain TOOLCHAIN_C_FLAGS_VARIABLE TOOLCHAIN_CXX_FLAGS_VARIABLE)
42 # On OS X, we often want to use gcc instead of clang, since gcc
43 # supports OpenMP (until clang 3.8, or so, plus whenever Apple
44 # support it in their version). However, by default gcc uses the
45 # external system assembler, which does not support AVX, so we
46 # need to tell the linker to use the clang compilers assembler
47 # instead - and this has to happen before we detect AVX flags.
48 if(APPLE AND CMAKE_C_COMPILER_ID STREQUAL "GNU")
49 gmx_test_cflag(GNU_C_USE_CLANG_AS "-Wa,-q" ${TOOLCHAIN_C_FLAGS_VARIABLE})
51 if(APPLE AND CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
52 gmx_test_cxxflag(GNU_CXX_USE_CLANG_AS "-Wa,-q" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
56 # Macro that manages setting the respective C and C++ toolchain
57 # variables so that subsequent tests for SIMD support can work.
58 macro(prepare_power_vsx_toolchain TOOLCHAIN_C_FLAGS_VARIABLE TOOLCHAIN_CXX_FLAGS_VARIABLE)
59 if(${CMAKE_CXX_COMPILER_ID} MATCHES "GNU" OR ${CMAKE_C_COMPILER_ID} MATCHES "GNU")
60 # VSX uses the same function API as Altivec/VMX, so make sure we tune for the current CPU and not VMX.
61 # By putting these flags here rather than in the general compiler flags file we can safely assume
62 # that we are at least on Power7 since that is when VSX appeared.
63 if(BUILD_CPU_BRAND MATCHES "POWER7")
64 gmx_test_cflag(GNU_C_VSX_POWER7 "-mcpu=power7 -mtune=power7" ${TOOLCHAIN_C_FLAGS_VARIABLE})
65 gmx_test_cflag(GNU_CXX_VSX_POWER7 "-mcpu=power7 -mtune=power7" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
67 # Enable power8 vector extensions on all platforms except old Power7.
68 gmx_test_cflag(GNU_C_VSX_POWER8 "-mcpu=power8 -mpower8-vector -mpower8-fusion -mdirect-move" ${TOOLCHAIN_C_FLAGS_VARIABLE})
69 gmx_test_cflag(GNU_CXX_VSX_POWER8 "-mcpu=power8 -mpower8-vector -mpower8-fusion -mdirect-move" ${TOOLCHAIN_CXX_FLAGS_VARIABLE})
71 # Altivec was originally single-only, and it took a while for compilers
72 # to support the double-precision features in VSX.
73 if(GMX_DOUBLE AND CMAKE_CXX_COMPILER_VERSION VERSION_LESS "4.9")
74 message(FATAL_ERROR "Using VSX SIMD in double precision with GCC requires GCC-4.9 or later.")
79 # Issue a fatal error with an appropriate message, when the toolchain
80 # was not able to compile code for SIMD support.
83 # SIMD_STRING A string describing the kind of SIMD support that didn't work.
84 # ALTERNATIVE_SUGGESTION A string describing anything the user could try other than getting a new compiler.
85 # SUGGEST_BINUTILS_UPDATE True when there's information that the compiler was OK, but something else was not.
86 function(gmx_give_fatal_error_when_simd_support_not_found SIMD_STRING ALTERNATIVE_SUGGESTION SUGGEST_BINUTILS_UPDATE)
87 if(SUGGEST_BINUTILS_UPDATE)
88 set(_msg "Found a compiler flag for ${SIMD_STRING} support, but some other problem exists. Update your assembler and/or linker, e.g. in the binutils package of your distribution.")
90 set(_msg "Cannot find ${SIMD_STRING} compiler flag. Use a newer compiler, or ${ALTERNATIVE_SUGGESTION}.")
92 message(FATAL_ERROR ${_msg})
95 macro(gmx_manage_simd)
97 set(GMX_SIMD_ACCURACY_BITS_SINGLE 22 CACHE STRING "Target mantissa bits for SIMD single math")
99 # Note that we typically restrict double precision target accuracy to be twice that
100 # of single. This means we only need one more N-R iteration for 1/sqrt(x) and 1(x),
101 # and the first iteration can sometimes be done as a pair in single precision. This should
102 # be plenty enough for Molecular Dynamics applications. Many of our double precision math
103 # functions still achieve very close to full double precision, but we do not guarantee that
104 # they will be able to achieve higher accuracy if you set this beyond 44 bits. GROMACS will
105 # work - but some unit tests might fail.
107 set(GMX_SIMD_ACCURACY_BITS_DOUBLE 44 CACHE STRING "Target mantissa bits for SIMD double math")
108 mark_as_advanced(GMX_SIMD_ACCURACY_BITS_SINGLE)
109 mark_as_advanced(GMX_SIMD_ACCURACY_BITS_DOUBLE)
111 if(${GMX_SIMD_ACCURACY_BITS_SINGLE} GREATER 22)
112 message(STATUS "Note: Full mantissa accuracy (including least significant bit) requested for SIMD single math. Presently we cannot get the least significant bit correct since that would require different algorithms - reducing to 22 bits.")
113 set(GMX_SIMD_ACCURACY_BITS_SINGLE 22 CACHE STRING "Target mantissa bits for SIMD single math" FORCE)
116 if(${GMX_SIMD_ACCURACY_BITS_DOUBLE} GREATER 51)
117 message(STATUS "Note: Full mantissa accuracy (including least significant bit) requested for SIMD double math. Presently we cannot get the least significant bit correct since that would require different algorithms - reducing to 51 bits.")
118 set(GMX_SIMD_ACCURACY_BITS_DOUBLE 51 CACHE STRING "Target mantissa bits for SIMD double math" FORCE)
122 # Section to set (and test) compiler flags for SIMD.
124 # The flags will be set based on the GMX_SIMD choice provided by the user.
125 # Automatic detection of the architecture on the build host is done prior to
126 # calling this macro.
129 if(GMX_SIMD STREQUAL "NONE")
130 # nothing to do configuration-wise
131 set(SIMD_STATUS_MESSAGE "SIMD instructions disabled")
132 elseif(GMX_SIMD STREQUAL "SSE2")
135 "#include<xmmintrin.h>
136 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_rsqrt_ps(x);return _mm_movemask_ps(x);}"
137 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
138 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
139 "-msse2" "/arch:SSE2" "-hgnu")
141 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
142 gmx_give_fatal_error_when_simd_support_not_found("SSE2" "disable SIMD support (slow)" "${SUGGEST_BINUTILS_UPDATE}")
145 set(GMX_SIMD_X86_${GMX_SIMD} 1)
146 set(SIMD_STATUS_MESSAGE "Enabling SSE2 SIMD instructions")
148 elseif(GMX_SIMD STREQUAL "SSE4.1")
150 # Note: MSVC enables SSE4.1 with the SSE2 flag, so we include that in testing.
152 "#include<smmintrin.h>
153 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_dp_ps(x,x,0x77);return _mm_movemask_ps(x);}"
154 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
155 SIMD_SSE_4_1_C_FLAGS SIMD_SSE_4_1_CXX_FLAGS
156 "-msse4.1" "/arch:SSE4.1" "/arch:SSE2" "-hgnu")
158 if(NOT SIMD_SSE_4_1_C_FLAGS OR NOT SIMD_SSE_4_1_CXX_FLAGS)
159 gmx_give_fatal_error_when_simd_support_not_found("SSE4.1" "choose SSE2 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
162 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
163 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
164 set(GMX_SIMD_X86_SSE4_1 1)
165 set(SIMD_STATUS_MESSAGE "Enabling SSE4.1 SIMD instructions")
167 elseif(GMX_SIMD STREQUAL "AVX_128_FMA")
169 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
171 # We don't have the full compiler version string yet (BUILD_C_COMPILER),
172 # so we can't distinguish vanilla from Apple clang versions, but catering for a few rare AMD
173 # hackintoshes is not worth the effort.
174 if (APPLE AND (CMAKE_C_COMPILER_ID STREQUAL "Clang" OR
175 CMAKE_CXX_COMPILER_ID STREQUAL "Clang"))
176 message(WARNING "Due to a known compiler bug, Clang up to version 3.2 (and Apple Clang up to version 4.1) produces incorrect code with AVX_128_FMA SIMD. As we cannot work around this bug on OS X, you will have to select a different compiler or SIMD instruction set.")
179 # clang <=3.2 contains a bug that causes incorrect code to be generated for the
180 # vfmaddps instruction and therefore the bug is triggered with AVX_128_FMA.
181 # (see: http://llvm.org/bugs/show_bug.cgi?id=15040).
182 # We can work around this by not using the integrated assembler (except on OS X
183 # which has an outdated assembler that does not support AVX instructions).
184 if (CMAKE_C_COMPILER_ID MATCHES "Clang" AND CMAKE_C_COMPILER_VERSION VERSION_LESS "3.3")
185 # we assume that we have an external assembler that supports AVX
186 message(STATUS "Clang ${CMAKE_C_COMPILER_VERSION} detected, enabling FMA bug workaround")
187 set(TOOLCHAIN_C_FLAGS "${TOOLCHAIN_C_FLAGS} -no-integrated-as")
189 if (CMAKE_CXX_COMPILER_ID MATCHES "Clang" AND CMAKE_CXX_COMPILER_VERSION VERSION_LESS "3.3")
190 # we assume that we have an external assembler that supports AVX
191 message(STATUS "Clang ${CMAKE_CXX_COMPILER_VERSION} detected, enabling FMA bug workaround")
192 set(TOOLCHAIN_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS} -no-integrated-as")
195 # AVX128/FMA on AMD is a bit complicated. We need to do detection in three stages:
196 # 1) Find the flags required for generic AVX support
197 # 2) Find the flags necessary to enable fused-multiply add support
198 # 3) Optional: Find a flag to enable the AMD XOP instructions
200 ### STAGE 1: Find the generic AVX flag
202 "#include<immintrin.h>
203 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_permute_ps(x,1);return 0;}"
204 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
205 SIMD_GENERIC_AVX_C_FLAGS SIMD_GENERIC_AVX_CXX_FLAGS
206 "-mavx" "/arch:AVX" "-hgnu")
208 ### STAGE 2: Find the fused-multiply add flag.
209 # GCC requires x86intrin.h for FMA support. MSVC 2010 requires intrin.h for FMA support.
210 check_include_file(x86intrin.h HAVE_X86INTRIN_H ${SIMD_C_FLAGS})
211 check_include_file(intrin.h HAVE_INTRIN_H ${SIMD_C_FLAGS})
213 set(INCLUDE_X86INTRIN_H "#include <x86intrin.h>")
216 set(INCLUDE_INTRIN_H "#include <xintrin.h>")
220 "#include<immintrin.h>
221 ${INCLUDE_X86INTRIN_H}
223 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_macc_ps(x,x,x);return _mm_movemask_ps(x);}"
224 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
225 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
228 # We only need to check the last (FMA) test; that will always fail if the generic AVX test failed
229 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
230 gmx_give_fatal_error_when_simd_support_not_found("128-bit AVX with FMA support" "choose SSE4.1 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
233 ### STAGE 3: Optional: Find the XOP instruction flag (No point in yelling if this does not work)
235 "#include<immintrin.h>
236 ${INCLUDE_X86INTRIN_H}
238 int main(){__m128 x=_mm_set1_ps(0.5);x=_mm_frcz_ps(x);return _mm_movemask_ps(x);}"
239 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
240 SIMD_AVX_128_XOP_C_FLAGS SIMD_AVX_128_XOP_CXX_FLAGS
243 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
244 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
245 set(GMX_SIMD_X86_${GMX_SIMD} 1)
246 set(SIMD_STATUS_MESSAGE "Enabling 128-bit AVX SIMD GROMACS SIMD (with fused-multiply add)")
248 gmx_test_avx_gcc_maskload_bug(GMX_SIMD_X86_AVX_GCC_MASKLOAD_BUG "${SIMD_C_FLAGS}")
250 elseif(GMX_SIMD STREQUAL "AVX_256")
252 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
255 "#include<immintrin.h>
256 int main(){__m256 x=_mm256_set1_ps(0.5);x=_mm256_add_ps(x,x);return _mm256_movemask_ps(x);}"
257 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
258 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
259 "-mavx" "/arch:AVX" "-hgnu")
261 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
262 gmx_give_fatal_error_when_simd_support_not_found("AVX" "choose SSE4.1 SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
265 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
266 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
267 set(GMX_SIMD_X86_${GMX_SIMD} 1)
268 set(SIMD_STATUS_MESSAGE "Enabling 256-bit AVX SIMD instructions")
270 gmx_test_avx_gcc_maskload_bug(GMX_SIMD_X86_AVX_GCC_MASKLOAD_BUG "${SIMD_C_FLAGS}")
272 elseif(GMX_SIMD STREQUAL "AVX2_256")
274 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
277 "#include<immintrin.h>
278 int main(){__m256i x=_mm256_set1_epi32(5);x=_mm256_add_epi32(x,x);return _mm256_movemask_epi8(x);}"
279 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
280 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
281 "-march=core-avx2" "-mavx2" "/arch:AVX" "-hgnu") # no AVX2-specific flag for MSVC yet
283 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
284 gmx_give_fatal_error_when_simd_support_not_found("AVX2" "choose AVX SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
287 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
288 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
289 set(GMX_SIMD_X86_${GMX_SIMD} 1)
290 set(SIMD_STATUS_MESSAGE "Enabling 256-bit AVX2 SIMD instructions")
292 # No need to test for Maskload bug - it was fixed before gcc added AVX2 support
294 elseif(GMX_SIMD STREQUAL "MIC")
296 # No flags needed. Not testing.
297 set(GMX_SIMD_X86_MIC 1)
298 set(SIMD_STATUS_MESSAGE "Enabling MIC (Xeon Phi) SIMD instructions")
300 elseif(GMX_SIMD STREQUAL "AVX_512")
302 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
305 "#include<immintrin.h>
306 int main(){__m512 y,x=_mm512_set1_ps(0.5);y=_mm512_fmadd_ps(x,x,x);return (int)_mm512_cmp_ps_mask(x,y,_CMP_LT_OS);}"
307 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
308 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
309 "-xMIC-AVX512" "-mavx512f -mfma" "-mavx512f" "/arch:AVX" "-hgnu") # no AVX_512F flags known for MSVC yet
311 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
312 gmx_give_fatal_error_when_simd_support_not_found("AVX 512F" "choose a lower level of SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
315 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
316 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
317 set(GMX_SIMD_X86_${GMX_SIMD} 1)
318 set(SIMD_STATUS_MESSAGE "Enabling 512-bit AVX-512 SIMD instructions")
320 elseif(GMX_SIMD STREQUAL "AVX_512_KNL")
322 prepare_x86_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
325 "#include<immintrin.h>
326 int main(){__m512 y,x=_mm512_set1_ps(0.5);y=_mm512_rsqrt28_ps(x);return (int)_mm512_cmp_ps_mask(x,y,_CMP_LT_OS);}"
327 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
328 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
329 "-xMIC-AVX512" "-mavx512er -mfma" "-mavx512er" "/arch:AVX" "-hgnu") # no AVX_512ER flags known for MSVC yet
331 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
332 gmx_give_fatal_error_when_simd_support_not_found("AVX 512ER" "choose a lower level of SIMD (slower)" "${SUGGEST_BINUTILS_UPDATE}")
335 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
336 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
337 set(GMX_SIMD_X86_${GMX_SIMD} 1)
338 set(SIMD_STATUS_MESSAGE "Enabling 512-bit AVX-512-KNL SIMD instructions")
340 elseif(GMX_SIMD STREQUAL "ARM_NEON")
343 "#include<arm_neon.h>
344 int main(){float32x4_t x=vdupq_n_f32(0.5);x=vmlaq_f32(x,x,x);return vgetq_lane_f32(x,0)>0;}"
345 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
346 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
347 "-mfpu=neon-vfpv4" "-mfpu=neon" "")
349 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
350 gmx_give_fatal_error_when_simd_support_not_found("ARM NEON" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
353 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
354 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
355 set(GMX_SIMD_${GMX_SIMD} 1)
356 set(SIMD_STATUS_MESSAGE "Enabling 32-bit ARM NEON SIMD instructions")
358 elseif(GMX_SIMD STREQUAL "ARM_NEON_ASIMD")
361 "#include<arm_neon.h>
362 int main(){float64x2_t x=vdupq_n_f64(0.5);x=vfmaq_f64(x,x,x);x=vrndnq_f64(x);return vgetq_lane_f64(x,0)>0;}"
363 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
364 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
367 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
368 gmx_give_fatal_error_when_simd_support_not_found("ARM (AArch64) NEON Advanced SIMD" "particularly gcc version 4.9 or later, or disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
371 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
372 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
373 set(GMX_SIMD_${GMX_SIMD} 1)
374 set(SIMD_STATUS_MESSAGE "Enabling ARM (AArch64) NEON Advanced SIMD instructions")
376 elseif(GMX_SIMD STREQUAL "IBM_QPX")
378 try_compile(TEST_QPX ${CMAKE_BINARY_DIR}
379 "${CMAKE_SOURCE_DIR}/cmake/TestQPX.c")
382 message(WARNING "IBM QPX SIMD instructions selected. This will work, but SIMD kernels are only available for the Verlet cut-off scheme. The plain C kernels that are used for the group cut-off scheme kernels will be slow, so please consider using the Verlet cut-off scheme.")
383 set(GMX_SIMD_${GMX_SIMD} 1)
384 set(SIMD_STATUS_MESSAGE "Enabling IBM QPX SIMD instructions")
387 gmx_give_fatal_error_when_simd_support_not_found("IBM QPX" "or 'cmake .. -DCMAKE_TOOLCHAIN_FILE=Platform/BlueGeneQ-static-XL-CXX' to set up the tool chain" "${SUGGEST_BINUTILS_UPDATE}")
390 elseif(GMX_SIMD STREQUAL "IBM_VMX")
394 int main(){vector float x,y=vec_ctf(vec_splat_s32(1),0);x=vec_madd(y,y,y);return vec_all_ge(y,x);}"
395 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
396 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
397 "-maltivec -mabi=altivec" "-qarch=auto -qaltivec")
399 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
400 gmx_give_fatal_error_when_simd_support_not_found("IBM VMX" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
403 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
404 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
405 set(GMX_SIMD_${GMX_SIMD} 1)
406 set(SIMD_STATUS_MESSAGE "Enabling IBM VMX SIMD instructions")
408 elseif(GMX_SIMD STREQUAL "IBM_VSX")
410 prepare_power_vsx_toolchain(TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS)
414 int main(){vector double x,y=vec_splats(1.0);x=vec_madd(y,y,y);return vec_all_ge(y,x);}"
415 TOOLCHAIN_C_FLAGS TOOLCHAIN_CXX_FLAGS
416 SIMD_${GMX_SIMD}_C_FLAGS SIMD_${GMX_SIMD}_CXX_FLAGS
417 "-mvsx" "-maltivec -mabi=altivec" "-qarch=auto -qaltivec")
419 if(NOT SIMD_${GMX_SIMD}_C_FLAGS OR NOT SIMD_${GMX_SIMD}_CXX_FLAGS)
420 gmx_give_fatal_error_when_simd_support_not_found("IBM VSX" "disable SIMD support (slower)" "${SUGGEST_BINUTILS_UPDATE}")
423 set(SIMD_C_FLAGS "${TOOLCHAIN_C_FLAGS}")
424 set(SIMD_CXX_FLAGS "${TOOLCHAIN_CXX_FLAGS}")
425 set(GMX_SIMD_${GMX_SIMD} 1)
426 set(SIMD_STATUS_MESSAGE "Enabling IBM VSX SIMD instructions")
428 elseif(GMX_SIMD STREQUAL "SPARC64_HPC_ACE")
430 # Note that GMX_RELAXED_DOUBLE_PRECISION is enabled by default in the top-level CMakeLists.txt
432 set(GMX_SIMD_${GMX_SIMD} 1)
433 set(SIMD_STATUS_MESSAGE "Enabling Sparc64 HPC-ACE SIMD instructions")
435 elseif(GMX_SIMD STREQUAL "REFERENCE")
437 # NB: This file handles settings for the SIMD module, so in the interest
438 # of proper modularization, please do NOT put any verlet kernel settings in this file.
440 if(GMX_SIMD_REF_FLOAT_WIDTH)
441 add_definitions(-DGMX_SIMD_REF_FLOAT_WIDTH=${GMX_SIMD_REF_FLOAT_WIDTH})
443 if(GMX_SIMD_REF_DOUBLE_WIDTH)
444 add_definitions(-DGMX_SIMD_REF_DOUBLE_WIDTH=${GMX_SIMD_REF_DOUBLE_WIDTH})
447 set(GMX_SIMD_${GMX_SIMD} 1)
448 set(SIMD_STATUS_MESSAGE "Enabling reference (emulated) SIMD instructions.")
451 gmx_invalid_option_value(GMX_SIMD)
455 gmx_check_if_changed(SIMD_CHANGED GMX_SIMD)
456 if (SIMD_CHANGED AND DEFINED SIMD_STATUS_MESSAGE)
457 message(STATUS "${SIMD_STATUS_MESSAGE}")
460 # By default, 32-bit windows cannot pass SIMD (SSE/AVX) arguments in registers,
461 # and even on 64-bit (all platforms) it is only used for a handful of arguments.
462 # The __vectorcall (MSVC, from MSVC2013) or __regcall (ICC) calling conventions
463 # enable this, which is critical to enable 32-bit SIMD and improves performance
465 # Check if the compiler supports one of these, and in that case set gmx_simdcall
466 # to that string. If we do not have any such calling convention modifier, set it
467 # to an empty string.
469 # Update 2015-11-04: As of version 3.6, clang has added support for __vectorcall
470 # (also on Linux). This appears to be buggy for the reference SIMD
471 # implementation when using the Debug build (when functions are not inlined)
472 # while it seems works fine for the actual SIMD implementations. This is likely
473 # because the reference build ends up passing lots of structures with arrays
474 # rather than actual vector data. For now we disable __vectorcall with clang
475 # when using the reference build.
477 if(NOT DEFINED GMX_SIMD_CALLING_CONVENTION)
479 set(CALLCONV_LIST " ")
480 elseif(CMAKE_CXX_COMPILER_ID MATCHES "Clang" AND GMX_SIMD STREQUAL "REFERENCE")
481 set(CALLCONV_LIST __regcall " ")
483 set(CALLCONV_LIST __vectorcall __regcall " ")
485 foreach(callconv ${CALLCONV_LIST})
486 set(callconv_compile_var "_callconv_${callconv}")
487 check_c_source_compiles("int ${callconv} f(int i) {return i;} int main(void) {return f(0);}" ${callconv_compile_var})
488 if(${callconv_compile_var})
489 set(GMX_SIMD_CALLING_CONVENTION "${callconv}" CACHE INTERNAL "Calling convention for SIMD routines" FORCE)