1 /* Machine-dependent ELF dynamic relocation functions. PowerPC version.
2 Copyright (C) 1995-2003, 2004, 2005 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, write to the Free
17 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 #include <sys/param.h>
25 #include <elf/dynamic-link.h>
26 #include <dl-machine.h>
27 #include <stdio-common/_itoa.h>
29 /* The value __cache_line_size is defined in memset.S and is initialised
30 by _dl_sysdep_start via DL_PLATFORM_INIT. */
31 extern int __cache_line_size
;
32 weak_extern (__cache_line_size
)
34 /* Because ld.so is now versioned, these functions can be in their own file;
35 no relocations need to be done to call them.
36 Of course, if ld.so is not versioned... */
37 #if defined SHARED && !(DO_VERSIONING - 0)
38 #error This will not work with versioning turned off, sorry.
42 /* Stuff for the PLT. */
43 #define PLT_INITIAL_ENTRY_WORDS 18
44 #define PLT_LONGBRANCH_ENTRY_WORDS 0
45 #define PLT_TRAMPOLINE_ENTRY_WORDS 6
46 #define PLT_DOUBLE_SIZE (1<<13)
47 #define PLT_ENTRY_START_WORDS(entry_number) \
48 (PLT_INITIAL_ENTRY_WORDS + (entry_number)*2 \
49 + ((entry_number) > PLT_DOUBLE_SIZE \
50 ? ((entry_number) - PLT_DOUBLE_SIZE)*2 \
52 #define PLT_DATA_START_WORDS(num_entries) PLT_ENTRY_START_WORDS(num_entries)
54 /* Macros to build PowerPC opcode words. */
55 #define OPCODE_ADDI(rd,ra,simm) \
56 (0x38000000 | (rd) << 21 | (ra) << 16 | ((simm) & 0xffff))
57 #define OPCODE_ADDIS(rd,ra,simm) \
58 (0x3c000000 | (rd) << 21 | (ra) << 16 | ((simm) & 0xffff))
59 #define OPCODE_ADD(rd,ra,rb) \
60 (0x7c000214 | (rd) << 21 | (ra) << 16 | (rb) << 11)
61 #define OPCODE_B(target) (0x48000000 | ((target) & 0x03fffffc))
62 #define OPCODE_BA(target) (0x48000002 | ((target) & 0x03fffffc))
63 #define OPCODE_BCTR() 0x4e800420
64 #define OPCODE_LWZ(rd,d,ra) \
65 (0x80000000 | (rd) << 21 | (ra) << 16 | ((d) & 0xffff))
66 #define OPCODE_LWZU(rd,d,ra) \
67 (0x84000000 | (rd) << 21 | (ra) << 16 | ((d) & 0xffff))
68 #define OPCODE_MTCTR(rd) (0x7C0903A6 | (rd) << 21)
69 #define OPCODE_RLWINM(ra,rs,sh,mb,me) \
70 (0x54000000 | (rs) << 21 | (ra) << 16 | (sh) << 11 | (mb) << 6 | (me) << 1)
72 #define OPCODE_LI(rd,simm) OPCODE_ADDI(rd,0,simm)
73 #define OPCODE_ADDIS_HI(rd,ra,value) \
74 OPCODE_ADDIS(rd,ra,((value) + 0x8000) >> 16)
75 #define OPCODE_LIS_HI(rd,value) OPCODE_ADDIS_HI(rd,0,value)
76 #define OPCODE_SLWI(ra,rs,sh) OPCODE_RLWINM(ra,rs,sh,0,31-sh)
79 #define PPC_DCBST(where) asm volatile ("dcbst 0,%0" : : "r"(where) : "memory")
80 #define PPC_SYNC asm volatile ("sync" : : : "memory")
81 #define PPC_ISYNC asm volatile ("sync; isync" : : : "memory")
82 #define PPC_ICBI(where) asm volatile ("icbi 0,%0" : : "r"(where) : "memory")
83 #define PPC_DIE asm volatile ("tweq 0,0")
85 /* Use this when you've modified some code, but it won't be in the
86 instruction fetch queue (or when it doesn't matter if it is). */
87 #define MODIFIED_CODE_NOQUEUE(where) \
88 do { PPC_DCBST(where); PPC_SYNC; PPC_ICBI(where); } while (0)
89 /* Use this when it might be in the instruction queue. */
90 #define MODIFIED_CODE(where) \
91 do { PPC_DCBST(where); PPC_SYNC; PPC_ICBI(where); PPC_ISYNC; } while (0)
94 /* The idea here is that to conform to the ABI, we are supposed to try
95 to load dynamic objects between 0x10000 (we actually use 0x40000 as
96 the lower bound, to increase the chance of a memory reference from
97 a null pointer giving a segfault) and the program's load address;
98 this may allow us to use a branch instruction in the PLT rather
99 than a computed jump. The address is only used as a preference for
100 mmap, so if we get it wrong the worst that happens is that it gets
101 mapped somewhere else. */
104 __elf_preferred_address (struct link_map
*loader
, size_t maplength
,
105 ElfW(Addr
) mapstartpref
)
107 ElfW(Addr
) low
, high
;
111 /* If the object has a preference, load it there! */
112 if (mapstartpref
!= 0)
115 /* Otherwise, quickly look for a suitable gap between 0x3FFFF and
116 0x70000000. 0x3FFFF is so that references off NULL pointers will
117 cause a segfault, 0x70000000 is just paranoia (it should always
118 be superceded by the program's load address). */
121 for (nsid
= 0; nsid
< DL_NNS
; ++nsid
)
122 for (l
= GL(dl_ns
)[nsid
]._ns_loaded
; l
; l
= l
->l_next
)
124 ElfW(Addr
) mapstart
, mapend
;
125 mapstart
= l
->l_map_start
& ~(GLRO(dl_pagesize
) - 1);
126 mapend
= l
->l_map_end
| (GLRO(dl_pagesize
) - 1);
127 assert (mapend
> mapstart
);
129 /* Prefer gaps below the main executable, note that l ==
130 _dl_loaded does not work for static binaries loading
132 if ((mapend
>= high
|| l
->l_type
== lt_executable
)
135 else if (mapend
>= low
&& low
>= mapstart
)
137 else if (high
>= mapend
&& mapstart
>= low
)
139 if (high
- mapend
>= mapstart
- low
)
146 high
-= 0x10000; /* Allow some room between objects. */
147 maplength
= (maplength
| (GLRO(dl_pagesize
) - 1)) + 1;
148 if (high
<= low
|| high
- low
< maplength
)
150 return high
- maplength
; /* Both high and maplength are page-aligned. */
153 /* Set up the loaded object described by L so its unrelocated PLT
154 entries will jump to the on-demand fixup code in dl-runtime.c.
155 Also install a small trampoline to be used by entries that have
156 been relocated to an address too far away for a single branch. */
158 /* There are many kinds of PLT entries:
160 (1) A direct jump to the actual routine, either a relative or
161 absolute branch. These are set up in __elf_machine_fixup_plt.
163 (2) Short lazy entries. These cover the first 8192 slots in
164 the PLT, and look like (where 'index' goes from 0 to 8191):
167 b &plt[PLT_TRAMPOLINE_ENTRY_WORDS+1]
169 (3) Short indirect jumps. These replace (2) when a direct jump
170 wouldn't reach. They look the same except that the branch
171 is 'b &plt[PLT_LONGBRANCH_ENTRY_WORDS]'.
173 (4) Long lazy entries. These cover the slots when a short entry
174 won't fit ('index*4' overflows its field), and look like:
176 lis %r11, %hi(index*4 + &plt[PLT_DATA_START_WORDS])
177 lwzu %r12, %r11, %lo(index*4 + &plt[PLT_DATA_START_WORDS])
178 b &plt[PLT_TRAMPOLINE_ENTRY_WORDS]
181 (5) Long indirect jumps. These replace (4) when a direct jump
182 wouldn't reach. They look like:
184 lis %r11, %hi(index*4 + &plt[PLT_DATA_START_WORDS])
185 lwz %r12, %r11, %lo(index*4 + &plt[PLT_DATA_START_WORDS])
189 (6) Long direct jumps. These are used when thread-safety is not
190 required. They look like:
192 lis %r12, %hi(finaladdr)
193 addi %r12, %r12, %lo(finaladdr)
198 The lazy entries, (2) and (4), are set up here in
199 __elf_machine_runtime_setup. (1), (3), and (5) are set up in
200 __elf_machine_fixup_plt. (1), (3), and (6) can also be constructed
201 in __process_machine_rela.
203 The reason for the somewhat strange construction of the long
204 entries, (4) and (5), is that we need to ensure thread-safety. For
205 (1) and (3), this is obvious because only one instruction is
206 changed and the PPC architecture guarantees that aligned stores are
207 atomic. For (5), this is more tricky. When changing (4) to (5),
208 the `b' instruction is first changed to to `mtctr'; this is safe
209 and is why the `lwzu' instruction is not just a simple `addi'.
210 Once this is done, and is visible to all processors, the `lwzu' can
211 safely be changed to a `lwz'. */
213 __elf_machine_runtime_setup (struct link_map
*map
, int lazy
, int profile
)
215 if (map
->l_info
[DT_JMPREL
])
218 Elf32_Word
*plt
= (Elf32_Word
*) D_PTR (map
, l_info
[DT_PLTGOT
]);
219 Elf32_Word num_plt_entries
= (map
->l_info
[DT_PLTRELSZ
]->d_un
.d_val
220 / sizeof (Elf32_Rela
));
221 Elf32_Word rel_offset_words
= PLT_DATA_START_WORDS (num_plt_entries
);
222 Elf32_Word data_words
= (Elf32_Word
) (plt
+ rel_offset_words
);
223 Elf32_Word size_modified
;
225 extern void _dl_runtime_resolve (void);
226 extern void _dl_prof_resolve (void);
228 /* Convert the index in r11 into an actual address, and get the
229 word at that address. */
230 plt
[PLT_LONGBRANCH_ENTRY_WORDS
] = OPCODE_ADDIS_HI (11, 11, data_words
);
231 plt
[PLT_LONGBRANCH_ENTRY_WORDS
+ 1] = OPCODE_LWZ (11, data_words
, 11);
233 /* Call the procedure at that address. */
234 plt
[PLT_LONGBRANCH_ENTRY_WORDS
+ 2] = OPCODE_MTCTR (11);
235 plt
[PLT_LONGBRANCH_ENTRY_WORDS
+ 3] = OPCODE_BCTR ();
239 Elf32_Word
*tramp
= plt
+ PLT_TRAMPOLINE_ENTRY_WORDS
;
240 Elf32_Word dlrr
= (Elf32_Word
)(profile
242 : _dl_runtime_resolve
);
245 if (profile
&& GLRO(dl_profile
) != NULL
246 && _dl_name_match_p (GLRO(dl_profile
), map
))
247 /* This is the object we are looking for. Say that we really
248 want profiling and the timers are started. */
249 GL(dl_profile_map
) = map
;
251 /* For the long entries, subtract off data_words. */
252 tramp
[0] = OPCODE_ADDIS_HI (11, 11, -data_words
);
253 tramp
[1] = OPCODE_ADDI (11, 11, -data_words
);
255 /* Multiply index of entry by 3 (in r11). */
256 tramp
[2] = OPCODE_SLWI (12, 11, 1);
257 tramp
[3] = OPCODE_ADD (11, 12, 11);
258 if (dlrr
<= 0x01fffffc || dlrr
>= 0xfe000000)
260 /* Load address of link map in r12. */
261 tramp
[4] = OPCODE_LI (12, (Elf32_Word
) map
);
262 tramp
[5] = OPCODE_ADDIS_HI (12, 12, (Elf32_Word
) map
);
264 /* Call _dl_runtime_resolve. */
265 tramp
[6] = OPCODE_BA (dlrr
);
269 /* Get address of _dl_runtime_resolve in CTR. */
270 tramp
[4] = OPCODE_LI (12, dlrr
);
271 tramp
[5] = OPCODE_ADDIS_HI (12, 12, dlrr
);
272 tramp
[6] = OPCODE_MTCTR (12);
274 /* Load address of link map in r12. */
275 tramp
[7] = OPCODE_LI (12, (Elf32_Word
) map
);
276 tramp
[8] = OPCODE_ADDIS_HI (12, 12, (Elf32_Word
) map
);
278 /* Call _dl_runtime_resolve. */
279 tramp
[9] = OPCODE_BCTR ();
282 /* Set up the lazy PLT entries. */
283 offset
= PLT_INITIAL_ENTRY_WORDS
;
285 while (i
< num_plt_entries
&& i
< PLT_DOUBLE_SIZE
)
287 plt
[offset
] = OPCODE_LI (11, i
* 4);
288 plt
[offset
+1] = OPCODE_B ((PLT_TRAMPOLINE_ENTRY_WORDS
+ 2
294 while (i
< num_plt_entries
)
296 plt
[offset
] = OPCODE_LIS_HI (11, i
* 4 + data_words
);
297 plt
[offset
+1] = OPCODE_LWZU (12, i
* 4 + data_words
, 11);
298 plt
[offset
+2] = OPCODE_B ((PLT_TRAMPOLINE_ENTRY_WORDS
301 plt
[offset
+3] = OPCODE_BCTR ();
307 /* Now, we've modified code. We need to write the changes from
308 the data cache to a second-level unified cache, then make
309 sure that stale data in the instruction cache is removed.
310 (In a multiprocessor system, the effect is more complex.)
311 Most of the PLT shouldn't be in the instruction cache, but
312 there may be a little overlap at the start and the end.
314 Assumes that dcbst and icbi apply to lines of 16 bytes or
315 more. Current known line sizes are 16, 32, and 128 bytes.
316 The following gets the __cache_line_size, when available. */
318 /* Default minimum 4 words per cache line. */
319 int line_size_words
= 4;
321 /* Don't try this until ld.so has relocated itself! */
322 int *line_size_ptr
= &__cache_line_size
;
323 if (lazy
&& line_size_ptr
!= NULL
)
325 /* Verify that __cache_line_size is defined and set. */
326 if (*line_size_ptr
!= 0)
327 /* Convert bytes to words. */
328 line_size_words
= *line_size_ptr
/ 4;
331 size_modified
= lazy
? rel_offset_words
: 6;
332 for (i
= 0; i
< size_modified
; i
+= line_size_words
)
334 PPC_DCBST (plt
+ size_modified
- 1);
337 for (i
= 0; i
< size_modified
; i
+= line_size_words
)
339 PPC_ICBI (plt
+ size_modified
- 1);
347 __elf_machine_fixup_plt (struct link_map
*map
, const Elf32_Rela
*reloc
,
348 Elf32_Addr
*reloc_addr
, Elf32_Addr finaladdr
)
350 Elf32_Sword delta
= finaladdr
- (Elf32_Word
) reloc_addr
;
351 if (delta
<< 6 >> 6 == delta
)
352 *reloc_addr
= OPCODE_B (delta
);
353 else if (finaladdr
<= 0x01fffffc || finaladdr
>= 0xfe000000)
354 *reloc_addr
= OPCODE_BA (finaladdr
);
357 Elf32_Word
*plt
, *data_words
;
358 Elf32_Word index
, offset
, num_plt_entries
;
360 num_plt_entries
= (map
->l_info
[DT_PLTRELSZ
]->d_un
.d_val
361 / sizeof(Elf32_Rela
));
362 plt
= (Elf32_Word
*) D_PTR (map
, l_info
[DT_PLTGOT
]);
363 offset
= reloc_addr
- plt
;
364 index
= (offset
- PLT_INITIAL_ENTRY_WORDS
)/2;
365 data_words
= plt
+ PLT_DATA_START_WORDS (num_plt_entries
);
369 if (index
< PLT_DOUBLE_SIZE
)
371 data_words
[index
] = finaladdr
;
373 *reloc_addr
= OPCODE_B ((PLT_LONGBRANCH_ENTRY_WORDS
- (offset
+1))
378 index
-= (index
- PLT_DOUBLE_SIZE
)/2;
380 data_words
[index
] = finaladdr
;
383 reloc_addr
[1] = OPCODE_MTCTR (12);
384 MODIFIED_CODE_NOQUEUE (reloc_addr
+ 1);
387 reloc_addr
[0] = OPCODE_LWZ (12,
388 (Elf32_Word
) (data_words
+ index
), 11);
391 MODIFIED_CODE (reloc_addr
);
396 _dl_reloc_overflow (struct link_map
*map
,
398 Elf32_Addr
*const reloc_addr
,
399 const Elf32_Sym
*refsym
)
403 t
= stpcpy (buffer
, name
);
404 t
= stpcpy (t
, " relocation at 0x00000000");
405 _itoa_word ((unsigned) reloc_addr
, t
, 16, 0);
410 strtab
= (const void *) D_PTR (map
, l_info
[DT_STRTAB
]);
411 t
= stpcpy (t
, " for symbol `");
412 t
= stpcpy (t
, strtab
+ refsym
->st_name
);
415 t
= stpcpy (t
, " out of range");
416 _dl_signal_error (0, map
->l_name
, NULL
, buffer
);
420 __process_machine_rela (struct link_map
*map
,
421 const Elf32_Rela
*reloc
,
422 struct link_map
*sym_map
,
423 const Elf32_Sym
*sym
,
424 const Elf32_Sym
*refsym
,
425 Elf32_Addr
*const reloc_addr
,
426 Elf32_Addr
const finaladdr
,
437 *reloc_addr
= finaladdr
;
441 ((char *) reloc_addr
)[0] = finaladdr
>> 24;
442 ((char *) reloc_addr
)[1] = finaladdr
>> 16;
443 ((char *) reloc_addr
)[2] = finaladdr
>> 8;
444 ((char *) reloc_addr
)[3] = finaladdr
;
448 if (__builtin_expect (finaladdr
> 0x01fffffc && finaladdr
< 0xfe000000, 0))
449 _dl_reloc_overflow (map
, "R_PPC_ADDR24", reloc_addr
, refsym
);
450 *reloc_addr
= (*reloc_addr
& 0xfc000003) | (finaladdr
& 0x3fffffc);
454 if (__builtin_expect (finaladdr
> 0x7fff && finaladdr
< 0xffff8000, 0))
455 _dl_reloc_overflow (map
, "R_PPC_ADDR16", reloc_addr
, refsym
);
456 *(Elf32_Half
*) reloc_addr
= finaladdr
;
460 if (__builtin_expect (finaladdr
> 0x7fff && finaladdr
< 0xffff8000, 0))
461 _dl_reloc_overflow (map
, "R_PPC_UADDR16", reloc_addr
, refsym
);
462 ((char *) reloc_addr
)[0] = finaladdr
>> 8;
463 ((char *) reloc_addr
)[1] = finaladdr
;
466 case R_PPC_ADDR16_LO
:
467 *(Elf32_Half
*) reloc_addr
= finaladdr
;
470 case R_PPC_ADDR16_HI
:
471 *(Elf32_Half
*) reloc_addr
= finaladdr
>> 16;
474 case R_PPC_ADDR16_HA
:
475 *(Elf32_Half
*) reloc_addr
= (finaladdr
+ 0x8000) >> 16;
479 case R_PPC_ADDR14_BRTAKEN
:
480 case R_PPC_ADDR14_BRNTAKEN
:
481 if (__builtin_expect (finaladdr
> 0x7fff && finaladdr
< 0xffff8000, 0))
482 _dl_reloc_overflow (map
, "R_PPC_ADDR14", reloc_addr
, refsym
);
483 *reloc_addr
= (*reloc_addr
& 0xffff0003) | (finaladdr
& 0xfffc);
484 if (rinfo
!= R_PPC_ADDR14
)
485 *reloc_addr
= ((*reloc_addr
& 0xffdfffff)
486 | ((rinfo
== R_PPC_ADDR14_BRTAKEN
)
487 ^ (finaladdr
>> 31)) << 21);
492 Elf32_Sword delta
= finaladdr
- (Elf32_Word
) reloc_addr
;
493 if (delta
<< 6 >> 6 != delta
)
494 _dl_reloc_overflow (map
, "R_PPC_REL24", reloc_addr
, refsym
);
495 *reloc_addr
= (*reloc_addr
& 0xfc000003) | (delta
& 0x3fffffc);
501 /* This can happen in trace mode when an object could not be
504 if (sym
->st_size
> refsym
->st_size
505 || (GLRO(dl_verbose
) && sym
->st_size
< refsym
->st_size
))
509 strtab
= (const void *) D_PTR (map
, l_info
[DT_STRTAB
]);
511 %s: Symbol `%s' has different size in shared object, onsider re-linking\n",
512 rtld_progname
?: "<program name unknown>",
513 strtab
+ refsym
->st_name
);
515 memcpy (reloc_addr
, (char *) finaladdr
, MIN (sym
->st_size
,
520 *reloc_addr
= finaladdr
- (Elf32_Word
) reloc_addr
;
524 /* It used to be that elf_machine_fixup_plt was used here,
525 but that doesn't work when ld.so relocates itself
526 for the second time. On the bright side, there's
527 no need to worry about thread-safety here. */
529 Elf32_Sword delta
= finaladdr
- (Elf32_Word
) reloc_addr
;
530 if (delta
<< 6 >> 6 == delta
)
531 *reloc_addr
= OPCODE_B (delta
);
532 else if (finaladdr
<= 0x01fffffc || finaladdr
>= 0xfe000000)
533 *reloc_addr
= OPCODE_BA (finaladdr
);
536 Elf32_Word
*plt
, *data_words
;
537 Elf32_Word index
, offset
, num_plt_entries
;
539 plt
= (Elf32_Word
*) D_PTR (map
, l_info
[DT_PLTGOT
]);
540 offset
= reloc_addr
- plt
;
542 if (offset
< PLT_DOUBLE_SIZE
*2 + PLT_INITIAL_ENTRY_WORDS
)
544 index
= (offset
- PLT_INITIAL_ENTRY_WORDS
)/2;
545 num_plt_entries
= (map
->l_info
[DT_PLTRELSZ
]->d_un
.d_val
546 / sizeof(Elf32_Rela
));
547 data_words
= plt
+ PLT_DATA_START_WORDS (num_plt_entries
);
548 data_words
[index
] = finaladdr
;
549 reloc_addr
[0] = OPCODE_LI (11, index
* 4);
550 reloc_addr
[1] = OPCODE_B ((PLT_LONGBRANCH_ENTRY_WORDS
553 MODIFIED_CODE_NOQUEUE (reloc_addr
+ 1);
557 reloc_addr
[0] = OPCODE_LIS_HI (12, finaladdr
);
558 reloc_addr
[1] = OPCODE_ADDI (12, 12, finaladdr
);
559 reloc_addr
[2] = OPCODE_MTCTR (12);
560 reloc_addr
[3] = OPCODE_BCTR ();
561 MODIFIED_CODE_NOQUEUE (reloc_addr
+ 3);
568 #define CHECK_STATIC_TLS(map, sym_map) \
570 if (__builtin_expect ((sym_map)->l_tls_offset == NO_TLS_OFFSET, 0)) \
571 _dl_allocate_static_tls (sym_map); \
573 # define DO_TLS_RELOC(suffix) \
574 case R_PPC_DTPREL##suffix: \
575 /* During relocation all TLS symbols are defined and used. \
576 Therefore the offset is already correct. */ \
577 if (sym_map != NULL) \
578 do_reloc##suffix ("R_PPC_DTPREL"#suffix, \
579 TLS_DTPREL_VALUE (sym, reloc)); \
581 case R_PPC_TPREL##suffix: \
582 if (sym_map != NULL) \
584 CHECK_STATIC_TLS (map, sym_map); \
585 do_reloc##suffix ("R_PPC_TPREL"#suffix, \
586 TLS_TPREL_VALUE (sym_map, sym, reloc)); \
590 inline void do_reloc16 (const char *r_name
, Elf32_Addr value
)
592 if (__builtin_expect (value
> 0x7fff && value
< 0xffff8000, 0))
593 _dl_reloc_overflow (map
, r_name
, reloc_addr
, refsym
);
594 *(Elf32_Half
*) reloc_addr
= value
;
596 inline void do_reloc16_LO (const char *r_name
, Elf32_Addr value
)
598 *(Elf32_Half
*) reloc_addr
= value
;
600 inline void do_reloc16_HI (const char *r_name
, Elf32_Addr value
)
602 *(Elf32_Half
*) reloc_addr
= value
>> 16;
604 inline void do_reloc16_HA (const char *r_name
, Elf32_Addr value
)
606 *(Elf32_Half
*) reloc_addr
= (value
+ 0x8000) >> 16;
615 _dl_reloc_bad_type (map
, rinfo
, 0);
619 MODIFIED_CODE_NOQUEUE (reloc_addr
);