PowerPC: strncat optimization for PPC64
commite5829d82c88117c9f4752cedfefc8516cb9ffdf7
authorAdhemerval Zanella <azanella@linux.vnet.ibm.com>
Fri, 7 Mar 2014 12:09:47 +0000 (7 06:09 -0600)
committerAdhemerval Zanella <azanella@linux.vnet.ibm.com>
Mon, 10 Mar 2014 12:46:38 +0000 (10 07:46 -0500)
tree191bc64df21b8a596c71186084a86336afbbbb0d
parente032058ea756e396c4ed1395a44d8b321e370b2f
PowerPC: strncat optimization for PPC64

The optimization is achieved by following techniques:
1. Doubleword aligned memory access and compares using
   cmpb instruction.
2. Loop unrolling for byte load/store.
3. CPU pre-fetch to avoid cache miss.

Backport of ba9cc0714e58a9e8fa73cf6b0e205cbf1e6b71f2
ChangeLog
sysdeps/powerpc/powerpc64/multiarch/Makefile
sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
sysdeps/powerpc/powerpc64/multiarch/strncat-power7.S [new file with mode: 0644]
sysdeps/powerpc/powerpc64/multiarch/strncat-ppc64.c [new file with mode: 0644]
sysdeps/powerpc/powerpc64/multiarch/strncat.c [new file with mode: 0644]
sysdeps/powerpc/powerpc64/power7/strncat.S [new file with mode: 0644]