PowerPC: strncat optimization for PPC64
commitba9cc0714e58a9e8fa73cf6b0e205cbf1e6b71f2
authorAdhemerval Zanella <azanella@linux.vnet.ibm.com>
Fri, 7 Mar 2014 12:09:47 +0000 (7 06:09 -0600)
committerAdhemerval Zanella <azanella@linux.vnet.ibm.com>
Mon, 10 Mar 2014 12:25:09 +0000 (10 07:25 -0500)
treef22f21e3972b49599186258fb2e748af8405a880
parent8b4ff97413fc32ea7f817586bc682ff2cc34527b
PowerPC: strncat optimization for PPC64

The optimization is achieved by following techniques:
1. Doubleword aligned memory access and compares using
   cmpb instruction.
2. Loop unrolling for byte load/store.
3. CPU pre-fetch to avoid cache miss.
ChangeLog
sysdeps/powerpc/powerpc64/multiarch/Makefile
sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
sysdeps/powerpc/powerpc64/multiarch/strncat-power7.S [new file with mode: 0644]
sysdeps/powerpc/powerpc64/multiarch/strncat-ppc64.c [new file with mode: 0644]
sysdeps/powerpc/powerpc64/multiarch/strncat.c [new file with mode: 0644]
sysdeps/powerpc/powerpc64/power7/strncat.S [new file with mode: 0644]