sysdeps/powerpc/sysdep.h

   1 /* Copyright (C) 1999, 2001, 2002 Free Software Foundation, Inc.
   2    This file is part of the GNU C Library.
   3
   4    The GNU C Library is free software; you can redistribute it and/or
   5    modify it under the terms of the GNU Lesser General Public
   6    License as published by the Free Software Foundation; either
   7    version 2.1 of the License, or (at your option) any later version.
   8
   9    The GNU C Library is distributed in the hope that it will be useful,
  10    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12    Lesser General Public License for more details.
  13
  14    You should have received a copy of the GNU Lesser General Public
  15    License along with the GNU C Library; if not, write to the Free
  16    Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  17    02111-1307 USA.  */
  18
  19 /*
  20  * Powerpc Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP).
  21  * This entry is copied to _dl_hwcap or rtld_global._dl_hwcap during startup.
  22  * The following must match the kernels linux/asm/cputable.h.
  23  */
  24 #define PPC_FEATURE_32                  0x80000000 /* 32-bit mode. */
  25 #define PPC_FEATURE_64                  0x40000000 /* 64-bit mode. */
  26 #define PPC_FEATURE_601_INSTR           0x20000000 /* 601 chip, Old POWER ISA.  */
  27 #define PPC_FEATURE_HAS_ALTIVEC         0x10000000 /* SIMD/Vector Unit.  */
  28 #define PPC_FEATURE_HAS_FPU             0x08000000 /* Floating Point Unit.  */
  29 #define PPC_FEATURE_HAS_MMU             0x04000000 /* Memory Management Unit.  */
  30 #define PPC_FEATURE_HAS_4xxMAC          0x02000000 /* 4xx Multiply Accumulator.  */
  31 #define PPC_FEATURE_UNIFIED_CACHE       0x01000000 /* Unified I/D cache.  */
  32 #define PPC_FEATURE_HAS_SPE             0x00800000
  33 #define PPC_FEATURE_HAS_EFP_SINGLE      0x00400000
  34 #define PPC_FEATURE_HAS_EFP_DOUBLE      0x00200000
  35 #define PPC_FEATURE_NO_TB               0x00100000 /* 601/403gx have no timebase */
  36 #define PPC_FEATURE_POWER4              0x00080000 /* POWER4 microarch level */
  37 #define PPC_FEATURE_POWER5              0x00040000 /* POWER5 microarch level */
  38 #define PPC_FEATURE_POWER5_PLUS         0x00020000 /* POWER5+ microarch level */
  39 #define PPC_FEATURE_CELL                0x00010000 /* CELL PU microarch level */
  40 #define PPC_FEATURE_970 (PPC_FEATURE_POWER4 + PPC_FEATURE_HAS_ALTIVEC)
  41
  42 #ifdef __ASSEMBLER__
  43
  44 /* Symbolic names for the registers.  The only portable way to write asm
  45    code is to use number but this produces really unreadable code.
  46    Therefore these symbolic names.  */
  47
  48 /* Integer registers.  */
  49 #define r0      0
  50 #define r1      1
  51 #define r2      2
  52 #define r3      3
  53 #define r4      4
  54 #define r5      5
  55 #define r6      6
  56 #define r7      7
  57 #define r8      8
  58 #define r9      9
  59 #define r10     10
  60 #define r11     11
  61 #define r12     12
  62 #define r13     13
  63 #define r14     14
  64 #define r15     15
  65 #define r16     16
  66 #define r17     17
  67 #define r18     18
  68 #define r19     19
  69 #define r20     20
  70 #define r21     21
  71 #define r22     22
  72 #define r23     23
  73 #define r24     24
  74 #define r25     25
  75 #define r26     26
  76 #define r27     27
  77 #define r28     28
  78 #define r29     29
  79 #define r30     30
  80 #define r31     31
  81
  82 /* Floating-point registers.  */
  83 #define fp0     0
  84 #define fp1     1
  85 #define fp2     2
  86 #define fp3     3
  87 #define fp4     4
  88 #define fp5     5
  89 #define fp6     6
  90 #define fp7     7
  91 #define fp8     8
  92 #define fp9     9
  93 #define fp10    10
  94 #define fp11    11
  95 #define fp12    12
  96 #define fp13    13
  97 #define fp14    14
  98 #define fp15    15
  99 #define fp16    16
 100 #define fp17    17
 101 #define fp18    18
 102 #define fp19    19
 103 #define fp20    20
 104 #define fp21    21
 105 #define fp22    22
 106 #define fp23    23
 107 #define fp24    24
 108 #define fp25    25
 109 #define fp26    26
 110 #define fp27    27
 111 #define fp28    28
 112 #define fp29    29
 113 #define fp30    30
 114 #define fp31    31
 115
 116 /* Condition code registers.  */
 117 #define cr0     0
 118 #define cr1     1
 119 #define cr2     2
 120 #define cr3     3
 121 #define cr4     4
 122 #define cr5     5
 123 #define cr6     6
 124 #define cr7     7
 125
 126 /* Vector registers. */
 127 #define v0      0
 128 #define v1      1
 129 #define v2      2
 130 #define v3      3
 131 #define v4      4
 132 #define v5      5
 133 #define v6      6
 134 #define v7      7
 135 #define v8      8
 136 #define v9      9
 137 #define v10     10
 138 #define v11     11
 139 #define v12     12
 140 #define v13     13
 141 #define v14     14
 142 #define v15     15
 143 #define v16     16
 144 #define v17     17
 145 #define v18     18
 146 #define v19     19
 147 #define v20     20
 148 #define v21     21
 149 #define v22     22
 150 #define v23     23
 151 #define v24     24
 152 #define v25     25
 153 #define v26     26
 154 #define v27     27
 155 #define v28     28
 156 #define v29     29
 157 #define v30     30
 158 #define v31     31
 159
 160 #define VRSAVE  256
 161
 162
 163 #ifdef __ELF__
 164
 165 /* This seems to always be the case on PPC.  */
 166 #define ALIGNARG(log2) log2
 167 /* For ELF we need the `.type' directive to make shared libs work right.  */
 168 #define ASM_TYPE_DIRECTIVE(name,typearg) .type name,typearg;
 169 #define ASM_SIZE_DIRECTIVE(name) .size name,.-name
 170
 171 #endif /* __ELF__ */
 172 #endif  /* __ASSEMBLER__ */
 173