Fix m68k bits/fenv.h for no-FPU ColdFire.
[glibc.git] / sysdeps / m68k / bits / fenv.h
blob7050ceff24c2365118485dd5c547e2379a0be904
1 /* Copyright (C) 1997-2018 Free Software Foundation, Inc.
2 This file is part of the GNU C Library.
4 The GNU C Library is free software; you can redistribute it and/or
5 modify it under the terms of the GNU Lesser General Public
6 License as published by the Free Software Foundation; either
7 version 2.1 of the License, or (at your option) any later version.
9 The GNU C Library is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 Lesser General Public License for more details.
14 You should have received a copy of the GNU Lesser General Public
15 License along with the GNU C Library. If not, see
16 <http://www.gnu.org/licenses/>. */
18 #ifndef _FENV_H
19 # error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
20 #endif
23 #if defined __HAVE_68881__ || defined __HAVE_FPU__ || defined __mcffpu__
25 /* Define bits representing the exception. We use the bit positions of
26 the appropriate bits in the FPSR Accrued Exception Byte. */
27 enum
29 FE_INEXACT =
30 # define FE_INEXACT (1 << 3)
31 FE_INEXACT,
32 FE_DIVBYZERO =
33 # define FE_DIVBYZERO (1 << 4)
34 FE_DIVBYZERO,
35 FE_UNDERFLOW =
36 # define FE_UNDERFLOW (1 << 5)
37 FE_UNDERFLOW,
38 FE_OVERFLOW =
39 # define FE_OVERFLOW (1 << 6)
40 FE_OVERFLOW,
41 FE_INVALID =
42 # define FE_INVALID (1 << 7)
43 FE_INVALID
46 # define FE_ALL_EXCEPT \
47 (FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID)
49 /* The m68k FPU supports all of the four defined rounding modes. We use
50 the bit positions in the FPCR Mode Control Byte as the values for the
51 appropriate macros. */
52 enum
54 FE_TONEAREST =
55 # define FE_TONEAREST 0
56 FE_TONEAREST,
57 FE_TOWARDZERO =
58 # define FE_TOWARDZERO (1 << 4)
59 FE_TOWARDZERO,
60 FE_DOWNWARD =
61 # define FE_DOWNWARD (2 << 4)
62 FE_DOWNWARD,
63 FE_UPWARD =
64 # define FE_UPWARD (3 << 4)
65 FE_UPWARD
68 #else
70 /* In the soft-float case, only rounding to nearest is supported, with
71 no exceptions. */
73 # define FE_ALL_EXCEPT 0
75 enum
77 __FE_UNDEFINED = -1,
79 FE_TONEAREST =
80 # define FE_TONEAREST 0
81 FE_TONEAREST
84 #endif
87 /* Type representing exception flags. */
88 typedef unsigned int fexcept_t;
91 #if defined __HAVE_68881__ || defined __HAVE_FPU__ || defined __mcffpu__
93 /* Type representing floating-point environment. This structure
94 corresponds to the layout of the block written by `fmovem'. */
95 typedef struct
97 unsigned int __control_register;
98 unsigned int __status_register;
99 unsigned int __instruction_address;
101 fenv_t;
103 #else
105 /* Keep ABI compatibility with the type used in the generic
106 bits/fenv.h, formerly used for no-FPU ColdFire. */
107 typedef struct
109 fexcept_t __excepts;
111 fenv_t;
113 #endif
115 /* If the default argument is used we use this value. */
116 #define FE_DFL_ENV ((const fenv_t *) -1)
118 #if defined __USE_GNU && (defined __HAVE_68881__ \
119 || defined __HAVE_FPU__ \
120 || defined __mcffpu__)
121 /* Floating-point environment where none of the exceptions are masked. */
122 # define FE_NOMASK_ENV ((const fenv_t *) -2)
123 #endif
125 #if __GLIBC_USE (IEC_60559_BFP_EXT)
126 /* Type representing floating-point control modes. */
127 typedef unsigned int femode_t;
129 /* Default floating-point control modes. */
130 # define FE_DFL_MODE ((const femode_t *) -1L)
131 #endif