sysdeps/aarch64/fpu/vecmath_config.h

   1 /* Configuration for libmvec routines.
   2    Copyright (C) 2023-2024 Free Software Foundation, Inc.
   3    This file is part of the GNU C Library.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Lesser General Public
   7    License as published by the Free Software Foundation; either
   8    version 2.1 of the License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Lesser General Public License for more details.
  14
  15    You should have received a copy of the GNU Lesser General Public
  16    License along with the GNU C Library; if not, see
  17    <https://www.gnu.org/licenses/>.  */
  18
  19 #ifndef _VECMATH_CONFIG_H
  20 #define _VECMATH_CONFIG_H
  21
  22 #include <math_private.h>
  23
  24 /* Deprecated config option from Arm Optimized Routines which ensures
  25    fp exceptions are correctly triggered. This is not intended to be
  26    supported in GLIBC, however we keep it for ease of development.  */
  27 #define WANT_SIMD_EXCEPT 0
  28
  29 /* Return ptr but hide its value from the compiler so accesses through it
  30    cannot be optimized based on the contents.  */
  31 #define ptr_barrier(ptr)                                                      \
  32   ({                                                                          \
  33     __typeof (ptr) __ptr = (ptr);                                             \
  34     __asm("" : "+r"(__ptr));                                                  \
  35     __ptr;                                                                    \
  36   })
  37
  38 static inline uint64_t
  39 asuint64 (double f)
  40 {
  41   union
  42   {
  43     double f;
  44     uint64_t i;
  45   } u = { f };
  46   return u.i;
  47 }
  48
  49 #define V_LOG_POLY_ORDER 6
  50 #define V_LOG_TABLE_BITS 7
  51 extern const struct v_log_data
  52 {
  53   /* Shared data for vector log and log-derived routines (e.g. asinh).  */
  54   double poly[V_LOG_POLY_ORDER - 1];
  55   double ln2;
  56   struct
  57   {
  58     double invc, logc;
  59   } table[1 << V_LOG_TABLE_BITS];
  60 } __v_log_data attribute_hidden;
  61
  62 #define V_EXP_TABLE_BITS 7
  63 extern const uint64_t __v_exp_data[1 << V_EXP_TABLE_BITS] attribute_hidden;
  64
  65 #define V_LOG2_TABLE_BITS 7
  66 extern const struct v_log2_data
  67 {
  68   double poly[5];
  69   double invln2;
  70   struct
  71   {
  72     double invc, log2c;
  73   } table[1 << V_LOG2_TABLE_BITS];
  74 } __v_log2_data attribute_hidden;
  75
  76 #define V_LOG10_TABLE_BITS 7
  77 extern const struct v_log10_data
  78 {
  79   double poly[5];
  80   double invln10, log10_2;
  81   struct
  82   {
  83     double invc, log10c;
  84   } table[1 << V_LOG10_TABLE_BITS];
  85 } __v_log10_data attribute_hidden;
  86
  87 extern const struct erff_data
  88 {
  89   struct
  90   {
  91     float erf, scale;
  92   } tab[513];
  93 } __erff_data attribute_hidden;
  94
  95 extern const struct sv_erff_data
  96 {
  97   float erf[513];
  98   float scale[513];
  99 } __sv_erff_data attribute_hidden;
 100
 101 extern const struct erf_data
 102 {
 103   struct
 104   {
 105     double erf, scale;
 106   } tab[769];
 107 } __erf_data attribute_hidden;
 108
 109 extern const struct sv_erf_data
 110 {
 111   double erf[769];
 112   double scale[769];
 113 } __sv_erf_data attribute_hidden;
 114
 115 #endif