sysdeps/mips/mips64/soft-fp/sfp-machine.h

   1 #include <fenv.h>
   2 #include <fpu_control.h>
   3
   4 #define _FP_W_TYPE_SIZE         64
   5 #define _FP_W_TYPE              unsigned long long
   6 #define _FP_WS_TYPE             signed long long
   7 #define _FP_I_TYPE              long long
   8
   9 #define _FP_MUL_MEAT_S(R,X,Y)                                   \
  10   _FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y)
  11 #define _FP_MUL_MEAT_D(R,X,Y)                                   \
  12   _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
  13 #define _FP_MUL_MEAT_Q(R,X,Y)                                   \
  14   _FP_MUL_MEAT_2_wide_3mul(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
  15
  16 #define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
  17 #define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y)
  18 #define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
  19
  20 #define _FP_NANFRAC_S           ((_FP_QNANBIT_S << 1) - 1)
  21 #define _FP_NANFRAC_D           ((_FP_QNANBIT_D << 1) - 1)
  22 #define _FP_NANFRAC_Q           ((_FP_QNANBIT_Q << 1) - 1), -1
  23 #define _FP_NANSIGN_S           0
  24 #define _FP_NANSIGN_D           0
  25 #define _FP_NANSIGN_Q           0
  26
  27 #define _FP_KEEPNANFRACP 1
  28 /* From my experiments it seems X is chosen unless one of the
  29    NaNs is sNaN,  in which case the result is NANSIGN/NANFRAC.  */
  30 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)                      \
  31   do {                                                          \
  32     if ((_FP_FRAC_HIGH_RAW_##fs(X) |                            \
  33          _FP_FRAC_HIGH_RAW_##fs(Y)) & _FP_QNANBIT_##fs)         \
  34       {                                                         \
  35         R##_s = _FP_NANSIGN_##fs;                               \
  36         _FP_FRAC_SET_##wc(R,_FP_NANFRAC_##fs);                  \
  37       }                                                         \
  38     else                                                        \
  39       {                                                         \
  40         R##_s = X##_s;                                          \
  41         _FP_FRAC_COPY_##wc(R,X);                                \
  42       }                                                         \
  43     R##_c = FP_CLS_NAN;                                         \
  44   } while (0)
  45
  46 #define _FP_DECL_EX             fpu_control_t _fcw
  47
  48 #define FP_ROUNDMODE            (_fcw & 0x3)
  49
  50 #define FP_RND_NEAREST          FE_TONEAREST
  51 #define FP_RND_ZERO             FE_TOWARDZERO
  52 #define FP_RND_PINF             FE_UPWARD
  53 #define FP_RND_MINF             FE_DOWNWARD
  54
  55 #define FP_EX_INVALID           FE_INVALID
  56 #define FP_EX_OVERFLOW          FE_OVERFLOW
  57 #define FP_EX_UNDERFLOW         FE_UNDERFLOW
  58 #define FP_EX_DIVZERO           FE_DIVBYZERO
  59 #define FP_EX_INEXACT           FE_INEXACT
  60
  61 #ifdef __mips_hard_float
  62 #define FP_INIT_ROUNDMODE                       \
  63 do {                                            \
  64   _FPU_GETCW (_fcw);                            \
  65 } while (0)
  66
  67 #define FP_HANDLE_EXCEPTIONS                    \
  68 do {                                            \
  69   if (__builtin_expect (_fex, 0))               \
  70     _FPU_SETCW (_fcw | _fex | (_fex << 10));    \
  71 } while (0)
  72 #define FP_TRAPPING_EXCEPTIONS ((_fcw >> 5) & 0x7c)
  73 #else
  74 #define FP_INIT_ROUNDMODE       _fcw = FP_RND_NEAREST
  75 #endif