1 /* Copyright (C) 1992, 1996, 1997, 1998 Free Software Foundation, Inc.
2 This file is part of the GNU C Library.
3 Contributed by David Mosberger.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Library General Public License as
7 published by the Free Software Foundation; either version 2 of the
8 License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Library General Public License for more details.
15 You should have received a copy of the GNU Library General Public
16 License along with the GNU C Library; see the file COPYING.LIB. If not,
17 write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
18 Boston, MA 02111-1307, USA. */
20 /* I/O access is restricted to ISA port space (ports 0..65535).
21 Modern devices hopefully are sane enough not to put any performance
22 critical registers in i/o space.
24 On the first call to ioperm() or _sethae(), the entire (E)ISA port
25 space is mapped into the virtual address space at address io.base.
26 mprotect() calls are then used to enable/disable access to ports. Per
27 page, there are PAGE_SIZE>>IO_SHIFT I/O ports (e.g., 256 ports on a
28 Low Cost Alpha based system using 8KB pages).
30 Keep in mind that this code should be able to run in a 32bit address
31 space. It is therefore unreasonable to expect mmap'ing the entire
32 sparse address space would work (e.g., the Low Cost Alpha chip has an
33 I/O address space that's 512MB large!). */
43 #include <sys/types.h>
47 #include <asm/system.h>
49 #define PATH_ALPHA_SYSTYPE "/etc/alpha_systype"
50 #define PATH_CPUINFO "/proc/cpuinfo"
52 #define MAX_PORT 0x10000
53 #define vuip volatile unsigned int *
55 #define JENSEN_IO_BASE (0xfffffc0300000000UL)
56 #define JENSEN_SPARSE_MEM (0xfffffc0200000000UL)
58 /* With respect to the I/O architecture, APECS and LCA are identical,
59 so the following defines apply to LCA as well. */
60 #define APECS_IO_BASE (0xfffffc01c0000000UL)
61 #define APECS_SPARSE_MEM (0xfffffc0200000000UL)
62 #define APECS_DENSE_MEM (0xfffffc0300000000UL)
64 /* The same holds for CIA and PYXIS. */
65 #define CIA_IO_BASE (0xfffffc8580000000UL)
66 #define CIA_SPARSE_MEM (0xfffffc8000000000UL)
67 #define CIA_DENSE_MEM (0xfffffc8600000000UL)
69 #define T2_IO_BASE (0xfffffc03a0000000UL)
70 #define T2_SPARSE_MEM (0xfffffc0200000000UL)
71 #define T2_DENSE_MEM (0xfffffc03c0000000UL)
74 IOSYS_UNKNOWN
, IOSYS_JENSEN
, IOSYS_APECS
, IOSYS_CIA
, IOSYS_T2
78 void (*sethae
)(unsigned long int addr
);
79 void (*outb
)(unsigned char b
, unsigned long int port
);
80 void (*outw
)(unsigned short b
, unsigned long int port
);
81 void (*outl
)(unsigned int b
, unsigned long int port
);
82 unsigned int (*inb
)(unsigned long int port
);
83 unsigned int (*inw
)(unsigned long int port
);
84 unsigned int (*inl
)(unsigned long int port
);
87 static struct platform
{
91 unsigned long int bus_memory_base
;
92 unsigned long int sparse_bus_memory_base
;
94 {"Alcor", IOSYS_CIA
, 5, CIA_DENSE_MEM
, CIA_SPARSE_MEM
},
95 {"Avanti", IOSYS_APECS
, 5, APECS_DENSE_MEM
, APECS_SPARSE_MEM
},
96 {"Cabriolet", IOSYS_APECS
, 5, APECS_DENSE_MEM
, APECS_SPARSE_MEM
},
97 {"EB164", IOSYS_CIA
, 5, CIA_DENSE_MEM
, CIA_SPARSE_MEM
},
98 {"EB64+", IOSYS_APECS
, 5, APECS_DENSE_MEM
, APECS_SPARSE_MEM
},
99 {"EB66", IOSYS_APECS
, 5, APECS_DENSE_MEM
, APECS_SPARSE_MEM
},
100 {"EB66P", IOSYS_APECS
, 5, APECS_DENSE_MEM
, APECS_SPARSE_MEM
},
101 {"Jensen", IOSYS_JENSEN
, 7, 0, JENSEN_SPARSE_MEM
},
102 {"Mikasa", IOSYS_APECS
, 5, APECS_DENSE_MEM
, APECS_SPARSE_MEM
},
103 {"Mustang", IOSYS_APECS
, 5, APECS_DENSE_MEM
, APECS_SPARSE_MEM
},
104 {"Noname", IOSYS_APECS
, 5, APECS_DENSE_MEM
, APECS_SPARSE_MEM
},
105 {"Sable", IOSYS_T2
, 5, T2_DENSE_MEM
, T2_SPARSE_MEM
},
106 {"Miata", IOSYS_CIA
, 5, CIA_DENSE_MEM
, CIA_SPARSE_MEM
},
107 {"Ruffian", IOSYS_CIA
, 5, CIA_DENSE_MEM
, CIA_SPARSE_MEM
},
113 unsigned long int cache
;
114 unsigned long int * reg
;
116 unsigned long int base
;
117 struct ioswtch
* swp
;
118 unsigned long int bus_memory_base
;
119 unsigned long int sparse_bus_memory_base
;
120 unsigned long int io_base
;
125 extern void __sethae (unsigned long int); /* we can't use asm/io.h */
128 static inline unsigned long int
129 port_to_cpu_addr (unsigned long int port
, iosys_t iosys
, int size
)
131 if (iosys
== IOSYS_JENSEN
)
132 return (port
<< 7) + ((size
- 1) << 5) + io
.base
;
134 return (port
<< 5) + ((size
- 1) << 3) + io
.base
;
139 inline_sethae (unsigned long int addr
, iosys_t iosys
)
141 if (iosys
== IOSYS_JENSEN
)
143 /* hae on the Jensen is bits 31:25 shifted right */
145 if (addr
!= io
.hae
.cache
)
153 unsigned long int msb
;
155 /* no need to set hae if msb is 0: */
156 msb
= addr
& 0xf8000000;
157 if (msb
&& msb
!= io
.hae
.cache
)
167 inline_outb (unsigned char b
, unsigned long int port
, iosys_t iosys
)
170 unsigned long int addr
= port_to_cpu_addr (port
, iosys
, 1);
172 inline_sethae (0, iosys
);
173 asm ("insbl %2,%1,%0" : "r=" (w
) : "ri" (port
& 0x3), "r" (b
));
180 inline_outw (unsigned short int b
, unsigned long int port
, iosys_t iosys
)
183 unsigned long int addr
= port_to_cpu_addr (port
, iosys
, 2);
185 inline_sethae (0, iosys
);
186 asm ("inswl %2,%1,%0" : "r=" (w
) : "ri" (port
& 0x3), "r" (b
));
193 inline_outl (unsigned int b
, unsigned long int port
, iosys_t iosys
)
195 unsigned long int addr
= port_to_cpu_addr (port
, iosys
, 4);
197 if (port
>= MAX_PORT
)
200 inline_sethae (0, iosys
);
206 static inline unsigned int
207 inline_inb (unsigned long int port
, iosys_t iosys
)
209 unsigned long int result
, addr
= port_to_cpu_addr (port
, iosys
, 1);
211 inline_sethae (0, iosys
);
212 result
= *(vuip
) addr
;
213 result
>>= (port
& 3) * 8;
214 return 0xffUL
& result
;
218 static inline unsigned int
219 inline_inw (unsigned long int port
, iosys_t iosys
)
221 unsigned long int result
, addr
= port_to_cpu_addr (port
, iosys
, 2);
223 inline_sethae (0, iosys
);
224 result
= *(vuip
) addr
;
225 result
>>= (port
& 3) * 8;
226 return 0xffffUL
& result
;
230 static inline unsigned int
231 inline_inl (unsigned long int port
, iosys_t iosys
)
233 unsigned long int addr
= port_to_cpu_addr (port
, iosys
, 4);
235 inline_sethae (0, iosys
);
240 #define DCL_SETHAE(name, iosys) \
242 name##_sethae (unsigned long int addr) \
244 inline_sethae (addr, IOSYS_##iosys); \
247 #define DCL_OUT(name, func, type, iosys) \
249 name##_##func (unsigned type b, unsigned long int addr) \
251 inline_##func (b, addr, IOSYS_##iosys); \
255 #define DCL_IN(name, func, iosys) \
256 static unsigned int \
257 name##_##func (unsigned long int addr) \
259 return inline_##func (addr, IOSYS_##iosys); \
263 DCL_SETHAE(jensen
, JENSEN
)
264 DCL_OUT(jensen
, outb
, char, JENSEN
)
265 DCL_OUT(jensen
, outw
, short int, JENSEN
)
266 DCL_OUT(jensen
, outl
, int, JENSEN
)
267 DCL_IN(jensen
, inb
, JENSEN
)
268 DCL_IN(jensen
, inw
, JENSEN
)
269 DCL_IN(jensen
, inl
, JENSEN
)
271 /* The APECS functions are also used for CIA since they are
274 DCL_SETHAE(apecs
, APECS
)
275 DCL_OUT(apecs
, outb
, char, APECS
)
276 DCL_OUT(apecs
, outw
, short int, APECS
)
277 DCL_OUT(apecs
, outl
, int, APECS
)
278 DCL_IN(apecs
, inb
, APECS
)
279 DCL_IN(apecs
, inw
, APECS
)
280 DCL_IN(apecs
, inl
, APECS
)
282 struct ioswtch ioswtch
[] = {
285 jensen_outb
, jensen_outw
, jensen_outl
,
286 jensen_inb
, jensen_inw
, jensen_inl
290 apecs_outb
, apecs_outw
, apecs_outl
,
291 apecs_inb
, apecs_inw
, apecs_inl
297 * Initialize I/O system. To determine what I/O system we're dealing
298 * with, we first try to read the value of symlink PATH_ALPHA_SYSTYPE,
299 * if that fails, we lookup the "system type" field in /proc/cpuinfo.
300 * If that fails as well, we give up.
302 * If the value received from PATH_ALPHA_SYSTYPE begins with a number,
303 * assume this is a previously unsupported system and the values encode,
304 * in order, "<io_base>,<hae_shift>,<dense_base>,<sparse_base>".
312 n
= readlink (PATH_ALPHA_SYSTYPE
, systype
, sizeof (systype
) - 1);
316 if (isdigit (systype
[0]))
318 if (sscanf (systype
, "%li,%i,%li,%li", &io
.io_base
, &io
.hae_shift
,
319 &io
.bus_memory_base
, &io
.sparse_bus_memory_base
) == 4)
321 io
.sys
= IOSYS_UNKNOWN
;
322 io
.swp
= &ioswtch
[1];
325 /* else we're likely going to fail with the system match below */
332 fp
= fopen (PATH_CPUINFO
, "r");
335 while ((n
= fscanf (fp
, "system type : %256[^\n]\n", systype
))
341 fgets (systype
, 256, fp
);
347 /* this can happen if the format of /proc/cpuinfo changes... */
349 "ioperm.init_iosys(): Unable to determine system type.\n"
350 "\t(May need " PATH_ALPHA_SYSTYPE
" symlink?)\n");
351 __set_errno (ENODEV
);
356 /* translate systype name into i/o system: */
357 for (i
= 0; i
< sizeof (platform
) / sizeof (platform
[0]); ++i
)
359 if (strcmp (platform
[i
].name
, systype
) == 0)
361 io
.hae_shift
= platform
[i
].hae_shift
;
362 io
.bus_memory_base
= platform
[i
].bus_memory_base
;
363 io
.sparse_bus_memory_base
= platform
[i
].sparse_bus_memory_base
;
364 io
.sys
= platform
[i
].io_sys
;
365 if (io
.sys
== IOSYS_JENSEN
)
366 io
.swp
= &ioswtch
[0];
368 io
.swp
= &ioswtch
[1];
373 /* systype is not a know platform name... */
374 __set_errno (EINVAL
);
380 _ioperm (unsigned long int from
, unsigned long int num
, int turn_on
)
382 unsigned long int addr
, len
;
385 if (!io
.swp
&& init_iosys () < 0)
388 /* this test isn't as silly as it may look like; consider overflows! */
389 if (from
>= MAX_PORT
|| from
+ num
> MAX_PORT
)
391 __set_errno (EINVAL
);
399 unsigned long int base
;
402 io
.hae
.reg
= 0; /* not used in user-level */
404 __sethae (io
.hae
.cache
); /* synchronize with hw */
406 fd
= open ("/dev/mem", O_RDWR
);
412 case IOSYS_UNKNOWN
: base
= io
.io_base
; break;
413 case IOSYS_JENSEN
: base
= JENSEN_IO_BASE
; break;
414 case IOSYS_APECS
: base
= APECS_IO_BASE
; break;
415 case IOSYS_CIA
: base
= CIA_IO_BASE
; break;
417 __set_errno (ENODEV
);
420 addr
= port_to_cpu_addr (0, io
.sys
, 1);
421 len
= port_to_cpu_addr (MAX_PORT
, io
.sys
, 1) - addr
;
423 (unsigned long int) __mmap (0, len
, PROT_NONE
, MAP_SHARED
,
426 if ((long) io
.base
== -1)
429 prot
= PROT_READ
| PROT_WRITE
;
434 return 0; /* never was turned on... */
436 /* turnoff access to relevant pages: */
439 addr
= port_to_cpu_addr (from
, io
.sys
, 1);
441 len
= port_to_cpu_addr (from
+ num
, io
.sys
, 1) - addr
;
442 return mprotect ((void *) addr
, len
, prot
);
447 _iopl (unsigned int level
)
451 __set_errno (EINVAL
);
456 return _ioperm (0, MAX_PORT
, 1);
463 _sethae (unsigned long int addr
)
465 if (!io
.swp
&& init_iosys () < 0)
468 io
.swp
->sethae (addr
);
473 _outb (unsigned char b
, unsigned long int port
)
475 if (port
>= MAX_PORT
)
478 io
.swp
->outb (b
, port
);
483 _outw (unsigned short b
, unsigned long int port
)
485 if (port
>= MAX_PORT
)
488 io
.swp
->outw (b
, port
);
493 _outl (unsigned int b
, unsigned long int port
)
495 if (port
>= MAX_PORT
)
498 io
.swp
->outl (b
, port
);
503 _inb (unsigned long int port
)
505 return io
.swp
->inb (port
);
510 _inw (unsigned long int port
)
512 return io
.swp
->inw (port
);
517 _inl (unsigned long int port
)
519 return io
.swp
->inl (port
);
526 if (!io
.swp
&& init_iosys () < 0)
528 return io
.bus_memory_base
;
532 _bus_base_sparse(void)
534 if (!io
.swp
&& init_iosys () < 0)
536 return io
.sparse_bus_memory_base
;
542 if (!io
.swp
&& init_iosys () < 0)
547 weak_alias (_sethae
, sethae
);
548 weak_alias (_ioperm
, ioperm
);
549 weak_alias (_iopl
, iopl
);
550 weak_alias (_inb
, inb
);
551 weak_alias (_inw
, inw
);
552 weak_alias (_inl
, inl
);
553 weak_alias (_outb
, outb
);
554 weak_alias (_outw
, outw
);
555 weak_alias (_outl
, outl
);
556 weak_alias (_bus_base
, bus_base
);
557 weak_alias (_bus_base_sparse
, bus_base_sparse
);
558 weak_alias (_hae_shift
, hae_shift
);