riscv: Fix feenvupdate with FE_DFL_ENV (BZ 31022)
[glibc.git] / sysdeps / x86_64 / sysdep.h
blob6ca169573d9a17c5955b90109367f5f0580a8ae0
1 /* Assembler macros for x86-64.
2 Copyright (C) 2001-2023 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <https://www.gnu.org/licenses/>. */
19 #ifndef _X86_64_SYSDEP_H
20 #define _X86_64_SYSDEP_H 1
22 #include <sysdeps/x86/sysdep.h>
23 #include <x86-lp_size.h>
25 #ifdef __ASSEMBLER__
27 /* Syntactic details of assembler. */
29 /* This macro is for setting proper CFI with DW_CFA_expression describing
30 the register as saved relative to %rsp instead of relative to the CFA.
31 Expression is DW_OP_drop, DW_OP_breg7 (%rsp is register 7), sleb128 offset
32 from %rsp. */
33 #define cfi_offset_rel_rsp(regn, off) .cfi_escape 0x10, regn, 0x4, 0x13, \
34 0x77, off & 0x7F | 0x80, off >> 7
36 /* If compiled for profiling, call `mcount' at the start of each function. */
37 #ifdef PROF
38 /* The mcount code relies on a normal frame pointer being on the stack
39 to locate our caller, so push one just for its benefit. */
40 #define CALL_MCOUNT \
41 pushq %rbp; \
42 cfi_adjust_cfa_offset(8); \
43 movq %rsp, %rbp; \
44 cfi_def_cfa_register(%rbp); \
45 call JUMPTARGET(mcount); \
46 popq %rbp; \
47 cfi_def_cfa(rsp,8);
48 #else
49 #define CALL_MCOUNT /* Do nothing. */
50 #endif
52 #define PSEUDO(name, syscall_name, args) \
53 lose: \
54 jmp JUMPTARGET(syscall_error) \
55 .globl syscall_error; \
56 ENTRY (name) \
57 DO_CALL (syscall_name, args); \
58 jb lose
60 #undef JUMPTARGET
61 #ifdef SHARED
62 # ifdef BIND_NOW
63 # define JUMPTARGET(name) *name##@GOTPCREL(%rip)
64 # else
65 # define JUMPTARGET(name) name##@PLT
66 # endif
67 #else
68 /* For static archives, branch to target directly. */
69 # define JUMPTARGET(name) name
70 #endif
72 /* Instruction to operate on long and pointer. */
73 #define LP_OP(insn) insn##q
75 /* Assembler address directive. */
76 #define ASM_ADDR .quad
78 /* Registers to hold long and pointer. */
79 #define RAX_LP rax
80 #define RBP_LP rbp
81 #define RBX_LP rbx
82 #define RCX_LP rcx
83 #define RDI_LP rdi
84 #define RDX_LP rdx
85 #define RSI_LP rsi
86 #define RSP_LP rsp
87 #define R8_LP r8
88 #define R9_LP r9
89 #define R10_LP r10
90 #define R11_LP r11
91 #define R12_LP r12
92 #define R13_LP r13
93 #define R14_LP r14
94 #define R15_LP r15
96 /* Zero upper vector registers and return with xtest. NB: Use VZEROALL
97 to avoid RTM abort triggered by VZEROUPPER inside transactionally. */
98 #define ZERO_UPPER_VEC_REGISTERS_RETURN_XTEST \
99 xtest; \
100 jnz 1f; \
101 vzeroupper; \
102 ret; \
103 1: \
104 vzeroall; \
107 /* Can be used to replace vzeroupper that is not directly before a
108 return. This is useful when hoisting a vzeroupper from multiple
109 return paths to decrease the total number of vzerouppers and code
110 size. */
111 #define COND_VZEROUPPER_XTEST \
112 xtest; \
113 jz 1f; \
114 vzeroall; \
115 jmp 2f; \
116 1: \
117 vzeroupper; \
120 /* In RTM define this as COND_VZEROUPPER_XTEST. */
121 #ifndef COND_VZEROUPPER
122 # define COND_VZEROUPPER vzeroupper
123 #endif
125 /* Zero upper vector registers and return. */
126 #ifndef ZERO_UPPER_VEC_REGISTERS_RETURN
127 # define ZERO_UPPER_VEC_REGISTERS_RETURN \
128 VZEROUPPER; \
130 #endif
132 #ifndef VZEROUPPER_RETURN
133 # define VZEROUPPER_RETURN VZEROUPPER; ret
134 #endif
136 #else /* __ASSEMBLER__ */
138 /* Instruction to operate on long and pointer. */
139 #define LP_OP(insn) #insn "q"
141 /* Assembler address directive. */
142 #define ASM_ADDR ".quad"
144 /* Registers to hold long and pointer. */
145 #define RAX_LP "rax"
146 #define RBP_LP "rbp"
147 #define RBX_LP "rbx"
148 #define RCX_LP "rcx"
149 #define RDI_LP "rdi"
150 #define RDX_LP "rdx"
151 #define RSI_LP "rsi"
152 #define RSP_LP "rsp"
153 #define R8_LP "r8"
154 #define R9_LP "r9"
155 #define R10_LP "r10"
156 #define R11_LP "r11"
157 #define R12_LP "r12"
158 #define R13_LP "r13"
159 #define R14_LP "r14"
160 #define R15_LP "r15"
162 #endif /* __ASSEMBLER__ */
164 #endif /* _X86_64_SYSDEP_H */