Updated to fedora-glibc-20041018T0940
[glibc.git] / sysdeps / unix / sysv / linux / alpha / register-dump.h
blobd55899a2c157eb52b9bd329c67cff55a49f6c777
1 /* Dump registers.
2 Copyright (C) 2004 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, write to the Free
17 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18 02111-1307 USA. */
20 #include <stddef.h>
21 #include <sys/uio.h>
23 /* We will print the register dump in this format:
25 V0: XXXXXXXXXXXXXXXX T0: XXXXXXXXXXXXXXXX T1: XXXXXXXXXXXXXXXX
26 T2: XXXXXXXXXXXXXXXX T3: XXXXXXXXXXXXXXXX T4: XXXXXXXXXXXXXXXX
27 T5: XXXXXXXXXXXXXXXX T6: XXXXXXXXXXXXXXXX T7: XXXXXXXXXXXXXXXX
28 S0: XXXXXXXXXXXXXXXX S1: XXXXXXXXXXXXXXXX S2: XXXXXXXXXXXXXXXX
29 S3: XXXXXXXXXXXXXXXX S4: XXXXXXXXXXXXXXXX S5: XXXXXXXXXXXXXXXX
30 S6: XXXXXXXXXXXXXXXX A0: XXXXXXXXXXXXXXXX A1: XXXXXXXXXXXXXXXX
31 A2: XXXXXXXXXXXXXXXX A3: XXXXXXXXXXXXXXXX A4: XXXXXXXXXXXXXXXX
32 A5: XXXXXXXXXXXXXXXX T8: XXXXXXXXXXXXXXXX T9: XXXXXXXXXXXXXXXX
33 T10: XXXXXXXXXXXXXXXX T11: XXXXXXXXXXXXXXXX RA: XXXXXXXXXXXXXXXX
34 T12: XXXXXXXXXXXXXXXX AT: XXXXXXXXXXXXXXXX GP: XXXXXXXXXXXXXXXX
35 SP: XXXXXXXXXXXXXXXX PC: XXXXXXXXXXXXXXXX
37 FP0: XXXXXXXXXXXXXXXX FP1: XXXXXXXXXXXXXXXX FP2: XXXXXXXXXXXXXXXX
38 FP3: XXXXXXXXXXXXXXXX FP4: XXXXXXXXXXXXXXXX FP5: XXXXXXXXXXXXXXXX
39 FP6: XXXXXXXXXXXXXXXX FP7: XXXXXXXXXXXXXXXX FP8: XXXXXXXXXXXXXXXX
40 FP9: XXXXXXXXXXXXXXXX FP10: XXXXXXXXXXXXXXXX FP11: XXXXXXXXXXXXXXXX
41 FP12: XXXXXXXXXXXXXXXX FP13: XXXXXXXXXXXXXXXX FP14: XXXXXXXXXXXXXXXX
42 FP15: XXXXXXXXXXXXXXXX FP16: XXXXXXXXXXXXXXXX FP17: XXXXXXXXXXXXXXXX
43 FP18: XXXXXXXXXXXXXXXX FP19: XXXXXXXXXXXXXXXX FP20: XXXXXXXXXXXXXXXX
44 FP21: XXXXXXXXXXXXXXXX FP22: XXXXXXXXXXXXXXXX FP23: XXXXXXXXXXXXXXXX
45 FP24: XXXXXXXXXXXXXXXX FP25: XXXXXXXXXXXXXXXX FP26: XXXXXXXXXXXXXXXX
46 FP27: XXXXXXXXXXXXXXXX FP28: XXXXXXXXXXXXXXXX FP29: XXXXXXXXXXXXXXXX
47 FP30: XXXXXXXXXXXXXXXX FPCR: XXXXXXXXXXXXXXXX
49 TA0: XXXXXXXXXXXXXXXX TA1: XXXXXXXXXXXXXXXX TA2: XXXXXXXXXXXXXXXX
52 #define NREGS (32+32+3)
54 static const char regnames[NREGS][8] =
56 " V0: ", " T0: ", " T1: ",
57 " T2: ", " T3: ", " T4: ",
58 " T5: ", " T6: ", " T7: ",
59 " S0: ", " S1: ", " S2: ",
60 " S3: ", " S4: ", " S5: ",
61 " S6: ", " A0: ", " A1: ",
62 " A2: ", " A3: ", " A4: ",
63 " A5: ", " T8: ", " T9: ",
64 " T10: ", " T11: ", " RA: ",
65 " T12: ", " AT: ", " GP: ",
66 " SP: ", " PC: ",
68 " FP0: ", " FP1: ", " FP2: ",
69 " FP3: ", " FP4: ", " FP5: ",
70 " FP6: ", " FP7: ", " FP8: ",
71 " FP9: ", " FP10: ", " FP11: ",
72 " FP12: ", " FP13: ", " FP14: ",
73 " FP15: ", " FP16: ", " FP17: ",
74 " FP18: ", " FP19: ", " FP20: ",
75 " FP21: ", " FP22: ", " FP23: ",
76 " FP24: ", " FP25: ", " FP26: ",
77 " FP27: ", " FP28: ", " FP29: ",
78 " FP30: ", " FPCR: ",
80 " TA0: ", " TA1: ", " TA2: "
83 #define O(FIELD, LF) offsetof(struct sigcontext, FIELD) + LF
85 static const int offsets[NREGS] =
87 O(sc_regs[0], 0), O(sc_regs[1], 0), O(sc_regs[2], 1),
88 O(sc_regs[3], 0), O(sc_regs[4], 0), O(sc_regs[5], 1),
89 O(sc_regs[6], 0), O(sc_regs[7], 0), O(sc_regs[8], 1),
90 O(sc_regs[9], 0), O(sc_regs[10], 0), O(sc_regs[11], 1),
91 O(sc_regs[12], 0), O(sc_regs[13], 0), O(sc_regs[14], 1),
92 O(sc_regs[15], 0), O(sc_regs[16], 0), O(sc_regs[17], 1),
93 O(sc_regs[18], 0), O(sc_regs[19], 0), O(sc_regs[20], 1),
94 O(sc_regs[21], 0), O(sc_regs[22], 0), O(sc_regs[23], 1),
95 O(sc_regs[24], 0), O(sc_regs[25], 0), O(sc_regs[26], 1),
96 O(sc_regs[27], 0), O(sc_regs[28], 0), O(sc_regs[29], 1),
97 O(sc_regs[30], 0), O(sc_pc, 2),
99 O(sc_fpregs[0], 0), O(sc_fpregs[1], 0), O(sc_fpregs[2], 1),
100 O(sc_fpregs[3], 0), O(sc_fpregs[4], 0), O(sc_fpregs[5], 1),
101 O(sc_fpregs[6], 0), O(sc_fpregs[7], 0), O(sc_fpregs[8], 1),
102 O(sc_fpregs[9], 0), O(sc_fpregs[10], 0), O(sc_fpregs[11], 1),
103 O(sc_fpregs[12], 0), O(sc_fpregs[13], 0), O(sc_fpregs[14], 1),
104 O(sc_fpregs[15], 0), O(sc_fpregs[16], 0), O(sc_fpregs[17], 1),
105 O(sc_fpregs[18], 0), O(sc_fpregs[19], 0), O(sc_fpregs[20], 1),
106 O(sc_fpregs[21], 0), O(sc_fpregs[22], 0), O(sc_fpregs[23], 1),
107 O(sc_fpregs[24], 0), O(sc_fpregs[25], 0), O(sc_fpregs[26], 1),
108 O(sc_fpregs[27], 0), O(sc_fpregs[28], 0), O(sc_fpregs[29], 1),
109 O(sc_fpregs[30], 0), O(sc_fpcr, 2),
111 O(sc_traparg_a0, 0), O(sc_traparg_a1, 0), O(sc_traparg_a2, 1)
114 #undef O
116 static const char linefeed[2] = "\n\n";
118 static void
119 register_dump (int fd, struct sigcontext *ctx)
121 char regs[NREGS][16];
122 struct iovec iov[2*NREGS+24];
123 size_t iov_i = 0, i, j;
125 #define ADD_MEM(str, len) \
126 (iov[iov_i].iov_base = (void *)(str), \
127 iov[iov_i].iov_len = len, \
128 ++iov_i)
130 #define ADD_STRING(str) ADD_MEM(str, strlen(str))
132 ADD_STRING ("Register dump:\n\n");
134 for (i = 0; i < NREGS; ++i)
136 int this_offset, this_lf;
137 unsigned long val;
139 this_offset = offsets[i];
140 this_lf = this_offset & 7;
141 this_offset &= -8;
143 val = *(unsigned long *)((char *)ctx + this_offset);
145 for (j = 0; j < 16; ++j)
147 unsigned long x = (val >> (64 - (j + 1) * 4)) & 15;
148 x += x < 10 ? '0' : 'a' - 10;
149 regs[i][j] = x;
152 ADD_MEM (regnames[i], 8);
153 ADD_MEM (regs[i], 16);
154 if (this_lf)
155 ADD_MEM (linefeed, this_lf);
158 writev (fd, iov, iov_i);
161 #define REGISTER_DUMP register_dump (fd, ctx)