| blob | 5427ff190711ae8cfa05a05d96662acfc252f967 |
1 /* Enumerate available IFUNC implementations of a function. x86-64 version.
2 Copyright (C) 2012-2023 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <https://www.gnu.org/licenses/>. */
19 #include <assert.h>
20 #include <string.h>
21 #include <wchar.h>
22 #include <ifunc-impl-list.h>
23 #include <sysdep.h>
26 /* Fill ARRAY of MAX elements with IFUNC implementations for function
27 NAME supported on target machine and return the number of valid
28 entries. Each set of implementations for a given function is sorted in
29 descending order by ISA level. */
31 size_t
34 {
37 /* Support sysdeps/x86_64/multiarch/memcmpeq.c. */
43 __memcmpeq_evex)
47 __memcmpeq_avx2)
52 __memcmpeq_avx2_rtm)
53 /* ISA V2 wrapper for SSE2 implementation because the SSE2
54 implementation is also used at ISA level 2. */
57 __memcmpeq_sse2))
59 /* Support sysdeps/x86_64/multiarch/memchr.c. */
65 __memchr_evex)
70 __memchr_evex512)
75 __memchr_evex_rtm)
79 __memchr_avx2)
84 __memchr_avx2_rtm)
85 /* ISA V2 wrapper for SSE2 implementation because the SSE2
86 implementation is also used at ISA level 2. */
89 __memchr_sse2))
91 /* Support sysdeps/x86_64/multiarch/memcmp.c. */
93 /* NB: If any of these names change or if any new
94 implementations are added be sure to update
95 sysdeps/x86_64/memcmp-isa-default-impl.h. */
101 __memcmp_evex_movbe)
106 __memcmp_avx2_movbe)
112 __memcmp_avx2_movbe_rtm)
113 /* ISA V2 wrapper for SSE2 implementation because the SSE2
114 implementation is also used at ISA level 2. */
117 __memcmp_sse2))
119 #ifdef SHARED
120 /* Support sysdeps/x86_64/multiarch/memmove_chk.c. */
123 __memmove_chk_erms)
126 __memmove_chk_avx512_no_vzeroupper)
129 __memmove_chk_avx512_unaligned)
132 __memmove_chk_avx512_unaligned_erms)
135 __memmove_chk_evex_unaligned)
138 __memmove_chk_evex_unaligned_erms)
141 __memmove_chk_avx_unaligned)
144 __memmove_chk_avx_unaligned_erms)
148 __memmove_chk_avx_unaligned_rtm)
152 __memmove_chk_avx_unaligned_erms_rtm)
153 /* By V3 we assume fast aligned copy. */
156 __memmove_chk_ssse3)
157 /* ISA V2 wrapper for SSE2 implementation because the SSE2
158 implementation is also used at ISA level 2 (SSSE3 is too
159 optimized around aligned copy to be better as general
160 purpose memmove). */
162 __memmove_chk_sse2_unaligned)
164 __memmove_chk_sse2_unaligned_erms))
165 #endif
167 /* Support sysdeps/x86_64/multiarch/memmove.c. */
170 __memmove_erms)
173 __memmove_avx512_no_vzeroupper)
176 __memmove_avx512_unaligned)
179 __memmove_avx512_unaligned_erms)
182 __memmove_evex_unaligned)
185 __memmove_evex_unaligned_erms)
188 __memmove_avx_unaligned)
191 __memmove_avx_unaligned_erms)
195 __memmove_avx_unaligned_rtm)
199 __memmove_avx_unaligned_erms_rtm)
200 /* By V3 we assume fast aligned copy. */
203 __memmove_ssse3)
204 /* ISA V2 wrapper for SSE2 implementation because the SSE2
205 implementation is also used at ISA level 2 (SSSE3 is too
206 optimized around aligned copy to be better as general
207 purpose memmove). */
209 __memmove_sse2_unaligned)
211 __memmove_sse2_unaligned_erms))
213 /* Support sysdeps/x86_64/multiarch/memrchr.c. */
220 __memrchr_evex)
225 __memrchr_avx2)
231 __memrchr_avx2_rtm)
232 /* ISA V2 wrapper for SSE2 implementation because the SSE2
233 implementation is also used at ISA level 2. */
236 __memrchr_sse2))
238 #ifdef SHARED
239 /* Support sysdeps/x86_64/multiarch/memset_chk.c. */
242 __memset_chk_erms)
247 __memset_chk_avx512_unaligned_erms)
252 __memset_chk_avx512_unaligned)
255 __memset_chk_avx512_no_vzeroupper)
260 __memset_chk_evex_unaligned)
265 __memset_chk_evex_unaligned_erms)
268 __memset_chk_avx2_unaligned)
271 __memset_chk_avx2_unaligned_erms)
275 __memset_chk_avx2_unaligned_rtm)
279 __memset_chk_avx2_unaligned_erms_rtm)
280 /* ISA V2 wrapper for SSE2 implementation because the SSE2
281 implementation is also used at ISA level 2. */
283 __memset_chk_sse2_unaligned)
285 __memset_chk_sse2_unaligned_erms)
286 )
287 #endif
289 /* Support sysdeps/x86_64/multiarch/memset.c. */
292 __memset_erms)
297 __memset_avx512_unaligned_erms)
302 __memset_avx512_unaligned)
305 __memset_avx512_no_vzeroupper)
310 __memset_evex_unaligned)
315 __memset_evex_unaligned_erms)
318 __memset_avx2_unaligned)
321 __memset_avx2_unaligned_erms)
325 __memset_avx2_unaligned_rtm)
329 __memset_avx2_unaligned_erms_rtm)
330 /* ISA V2 wrapper for SSE2 implementation because the SSE2
331 implementation is also used at ISA level 2. */
333 __memset_sse2_unaligned)
335 __memset_sse2_unaligned_erms)
336 )
338 /* Support sysdeps/x86_64/multiarch/rawmemchr.c. */
344 __rawmemchr_evex)
349 __rawmemchr_evex512)
354 __rawmemchr_evex_rtm)
358 __rawmemchr_avx2)
363 __rawmemchr_avx2_rtm)
364 /* ISA V2 wrapper for SSE2 implementation because the SSE2
365 implementation is also used at ISA level 2. */
368 __rawmemchr_sse2))
370 /* Support sysdeps/x86_64/multiarch/strlen.c. */
376 __strlen_evex)
381 __strlen_evex512)
385 __strlen_avx2)
390 __strlen_avx2_rtm)
391 /* ISA V2 wrapper for SSE2 implementation because the SSE2
392 implementation is also used at ISA level 2. */
395 __strlen_sse2))
397 /* Support sysdeps/x86_64/multiarch/strnlen.c. */
403 __strnlen_evex)
408 __strnlen_evex512)
412 __strnlen_avx2)
417 __strnlen_avx2_rtm)
418 /* ISA V2 wrapper for SSE2 implementation because the SSE2
419 implementation is also used at ISA level 2. */
422 __strnlen_sse2))
424 /* Support sysdeps/x86_64/multiarch/stpncpy.c. */
429 __stpncpy_evex)
432 __stpncpy_avx2)
436 __stpncpy_avx2_rtm)
437 /* ISA V2 wrapper for sse2_unaligned implementation because
438 the sse2_unaligned implementation is also used at ISA
439 level 2. */
442 __stpncpy_sse2_unaligned))
444 /* Support sysdeps/x86_64/multiarch/stpcpy.c. */
449 __stpcpy_evex)
452 __stpcpy_avx2)
456 __stpcpy_avx2_rtm)
457 /* ISA V2 wrapper for sse2_unaligned implementation because
458 the sse2_unaligned implementation is also used at ISA
459 level 2. */
462 __stpcpy_sse2_unaligned)
465 __stpcpy_sse2))
467 /* Support sysdeps/x86_64/multiarch/strcasecmp_l.c. */
473 __strcasecmp_evex)
477 __strcasecmp_avx2)
482 __strcasecmp_avx2_rtm)
485 __strcasecmp_sse42)
486 /* ISA V2 wrapper for SSE2 implementation because the SSE2
487 implementation is also used at ISA level 2. */
490 __strcasecmp_sse2))
492 /* Support sysdeps/x86_64/multiarch/strcasecmp_l.c. */
498 __strcasecmp_l_evex)
502 __strcasecmp_l_avx2)
507 __strcasecmp_l_avx2_rtm)
510 __strcasecmp_l_sse42)
511 /* ISA V2 wrapper for SSE2 implementation because the SSE2
512 implementation is also used at ISA level 2. */
515 __strcasecmp_l_sse2))
517 /* Support sysdeps/x86_64/multiarch/strcat.c. */
522 __strcat_evex)
525 __strcat_avx2)
529 __strcat_avx2_rtm)
530 /* ISA V2 wrapper for sse2_unaligned implementation because
531 the sse2_unaligned implementation is also used at ISA
532 level 2. */
535 __strcat_sse2_unaligned)
538 __strcat_sse2))
540 /* Support sysdeps/x86_64/multiarch/strchr.c. */
546 __strchr_evex)
550 __strchr_evex512)
554 __strchr_avx2)
559 __strchr_avx2_rtm)
560 /* ISA V2 wrapper for SSE2 implementation because the SSE2
561 implementation is also used at ISA level 2. */
564 __strchr_sse2)
567 __strchr_sse2_no_bsf))
569 /* Support sysdeps/x86_64/multiarch/strchrnul.c. */
575 __strchrnul_evex)
579 __strchrnul_evex512)
583 __strchrnul_avx2)
588 __strchrnul_avx2_rtm)
589 /* ISA V2 wrapper for SSE2 implementation because the SSE2
590 implementation is also used at ISA level 2. */
593 __strchrnul_sse2))
595 /* Support sysdeps/x86_64/multiarch/strrchr.c. */
602 __strrchr_evex)
607 __strrchr_evex512)
612 __strrchr_avx2)
618 __strrchr_avx2_rtm)
619 /* ISA V2 wrapper for SSE2 implementation because the SSE2
620 implementation is also used at ISA level 2. */
623 __strrchr_sse2))
625 /* Support sysdeps/x86_64/multiarch/strcmp.c. */
631 __strcmp_evex)
635 __strcmp_avx2)
640 __strcmp_avx2_rtm)
643 __strcmp_sse42)
644 /* ISA V2 wrapper for SSE2 implementations because the SSE2
645 implementations are also used at ISA level 2. */
648 __strcmp_sse2_unaligned)
651 __strcmp_sse2))
653 /* Support sysdeps/x86_64/multiarch/strcpy.c. */
658 __strcpy_evex)
661 __strcpy_avx2)
665 __strcpy_avx2_rtm)
666 /* ISA V2 wrapper for sse2_unaligned implementation because
667 the sse2_unaligned implementation is also used at ISA
668 level 2. */
671 __strcpy_sse2_unaligned)
674 __strcpy_sse2))
676 /* Support sysdeps/x86_64/multiarch/strcspn.c. */
678 /* All implementations of strcspn are built at all ISA
679 levels. */
681 __strcspn_sse42)
684 /* Support sysdeps/x86_64/multiarch/strncase_l.c. */
690 __strncasecmp_evex)
694 __strncasecmp_avx2)
699 __strncasecmp_avx2_rtm)
702 __strncasecmp_sse42)
703 /* ISA V2 wrapper for SSE2 implementation because the SSE2
704 implementation is also used at ISA level 2. */
707 __strncasecmp_sse2))
709 /* Support sysdeps/x86_64/multiarch/strncase_l.c. */
715 __strncasecmp_l_evex)
719 __strncasecmp_l_avx2)
724 __strncasecmp_l_avx2_rtm)
727 __strncasecmp_l_sse42)
728 /* ISA V2 wrapper for SSE2 implementation because the SSE2
729 implementation is also used at ISA level 2. */
732 __strncasecmp_l_sse2))
734 /* Support sysdeps/x86_64/multiarch/strncat.c. */
739 __strncat_evex)
742 __strncat_avx2)
746 __strncat_avx2_rtm)
747 /* ISA V2 wrapper for sse2_unaligned implementation because
748 the sse2_unaligned implementation is also used at ISA
749 level 2. */
752 __strncat_sse2_unaligned))
754 /* Support sysdeps/x86_64/multiarch/strncpy.c. */
759 __strncpy_evex)
762 __strncpy_avx2)
766 __strncpy_avx2_rtm)
767 /* ISA V2 wrapper for sse2_unaligned implementation because
768 the sse2_unaligned implementation is also used at ISA
769 level 2. */
772 __strncpy_sse2_unaligned))
774 /* Support sysdeps/x86_64/multiarch/strpbrk.c. */
776 /* All implementations of strpbrk are built at all ISA
777 levels. */
779 __strpbrk_sse42)
783 /* Support sysdeps/x86_64/multiarch/strspn.c. */
785 /* All implementations of strspn are built at all ISA
786 levels. */
788 __strspn_sse42)
791 /* Support sysdeps/x86_64/multiarch/strstr.c. */
798 __strstr_avx512)
802 /* Support sysdeps/x86_64/multiarch/wcschr.c. */
808 __wcschr_evex)
812 __wcschr_evex512)
816 __wcschr_avx2)
821 __wcschr_avx2_rtm)
822 /* ISA V2 wrapper for SSE2 implementation because the SSE2
823 implementation is also used at ISA level 2. */
826 __wcschr_sse2))
828 /* Support sysdeps/x86_64/multiarch/wcsrchr.c. */
835 __wcsrchr_evex)
840 __wcsrchr_evex512)
845 __wcsrchr_avx2)
851 __wcsrchr_avx2_rtm)
852 /* ISA V2 wrapper for SSE2 implementation because the SSE2
853 implementation is also used at ISA level 2. */
856 __wcsrchr_sse2))
858 /* Support sysdeps/x86_64/multiarch/wcscmp.c. */
864 __wcscmp_evex)
868 __wcscmp_avx2)
873 __wcscmp_avx2_rtm)
874 /* ISA V2 wrapper for SSE2 implementation because the SSE2
875 implementation is also used at ISA level 2. */
878 __wcscmp_sse2))
880 /* Support sysdeps/x86_64/multiarch/wcsncmp.c. */
886 __wcsncmp_evex)
890 __wcsncmp_avx2)
895 __wcsncmp_avx2_rtm)
896 /* ISA V2 wrapper for GENERIC implementation because the
897 GENERIC implementation is also used at ISA level 2. */
900 __wcsncmp_generic))
902 /* Support sysdeps/x86_64/multiarch/wcscpy.c. */
908 __wcscpy_evex)
912 __wcscpy_avx2)
915 __wcscpy_ssse3)
918 __wcscpy_generic))
920 /* Support sysdeps/x86_64/multiarch/wcsncpy.c. */
926 __wcsncpy_evex)
930 __wcsncpy_avx2)
933 __wcsncpy_generic))
935 /* Support sysdeps/x86_64/multiarch/wcpcpy.c. */
941 __wcpcpy_evex)
945 __wcpcpy_avx2)
948 __wcpcpy_generic))
950 /* Support sysdeps/x86_64/multiarch/wcpncpy.c. */
956 __wcpncpy_evex)
960 __wcpncpy_avx2)
963 __wcpncpy_generic))
965 /* Support sysdeps/x86_64/multiarch/wcscat.c. */
971 __wcscat_evex)
975 __wcscat_avx2)
978 __wcscat_generic))
980 /* Support sysdeps/x86_64/multiarch/wcsncat.c. */
986 __wcsncat_evex)
990 __wcsncat_avx2)
993 __wcsncat_generic))
995 /* Support sysdeps/x86_64/multiarch/wcslen.c. */
1001 __wcslen_evex)
1006 __wcslen_evex512)
1010 __wcslen_avx2)
1015 __wcslen_avx2_rtm)
1018 __wcslen_sse4_1)
1021 __wcslen_sse2))
1023 /* Support sysdeps/x86_64/multiarch/wcsnlen.c. */
1029 __wcsnlen_evex)
1034 __wcsnlen_evex512)
1038 __wcsnlen_avx2)
1043 __wcsnlen_avx2_rtm)
1046 __wcsnlen_sse4_1)
1049 __wcsnlen_generic))
1051 /* Support sysdeps/x86_64/multiarch/wmemchr.c. */
1057 __wmemchr_evex)
1062 __wmemchr_evex512)
1067 __wmemchr_evex_rtm)
1071 __wmemchr_avx2)
1076 __wmemchr_avx2_rtm)
1077 /* ISA V2 wrapper for SSE2 implementation because the SSE2
1078 implementation is also used at ISA level 2. */
1081 __wmemchr_sse2))
1083 /* Support sysdeps/x86_64/multiarch/wmemcmp.c. */
1090 __wmemcmp_evex_movbe)
1095 __wmemcmp_avx2_movbe)
1101 __wmemcmp_avx2_movbe_rtm)
1102 /* ISA V2 wrapper for SSE2 implementation because the SSE2
1103 implementation is also used at ISA level 2. */
1106 __wmemcmp_sse2))
1108 /* Support sysdeps/x86_64/multiarch/wmemset.c. */
1114 __wmemset_evex_unaligned)
1119 __wmemset_avx512_unaligned)
1122 __wmemset_avx2_unaligned)
1126 __wmemset_avx2_unaligned_rtm)
1127 /* ISA V2 wrapper for SSE2 implementation because the SSE2
1128 implementation is also used at ISA level 2. */
1130 __wmemset_sse2_unaligned))
1132 #ifdef SHARED
1133 /* Support sysdeps/x86_64/multiarch/memcpy_chk.c. */
1136 __memcpy_chk_erms)
1139 __memcpy_chk_avx512_no_vzeroupper)
1142 __memcpy_chk_avx512_unaligned)
1145 __memcpy_chk_avx512_unaligned_erms)
1148 __memcpy_chk_evex_unaligned)
1151 __memcpy_chk_evex_unaligned_erms)
1154 __memcpy_chk_avx_unaligned)
1157 __memcpy_chk_avx_unaligned_erms)
1161 __memcpy_chk_avx_unaligned_rtm)
1165 __memcpy_chk_avx_unaligned_erms_rtm)
1166 /* By V3 we assume fast aligned copy. */
1169 __memcpy_chk_ssse3)
1170 /* ISA V2 wrapper for SSE2 implementation because the SSE2
1171 implementation is also used at ISA level 2 (SSSE3 is too
1172 optimized around aligned copy to be better as general
1173 purpose memmove). */
1175 __memcpy_chk_sse2_unaligned)
1177 __memcpy_chk_sse2_unaligned_erms))
1178 #endif
1180 /* Support sysdeps/x86_64/multiarch/memcpy.c. */
1183 __memcpy_erms)
1186 __memcpy_avx512_no_vzeroupper)
1189 __memcpy_avx512_unaligned)
1192 __memcpy_avx512_unaligned_erms)
1195 __memcpy_evex_unaligned)
1198 __memcpy_evex_unaligned_erms)
1201 __memcpy_avx_unaligned)
1204 __memcpy_avx_unaligned_erms)
1208 __memcpy_avx_unaligned_rtm)
1212 __memcpy_avx_unaligned_erms_rtm)
1213 /* By V3 we assume fast aligned copy. */
1216 __memcpy_ssse3)
1217 /* ISA V2 wrapper for SSE2 implementation because the SSE2
1218 implementation is also used at ISA level 2 (SSSE3 is too
1219 optimized around aligned copy to be better as general
1220 purpose memmove). */
1222 __memcpy_sse2_unaligned)
1224 __memcpy_sse2_unaligned_erms))
1226 #ifdef SHARED
1227 /* Support sysdeps/x86_64/multiarch/mempcpy_chk.c. */
1230 __mempcpy_chk_erms)
1233 __mempcpy_chk_avx512_no_vzeroupper)
1236 __mempcpy_chk_avx512_unaligned)
1239 __mempcpy_chk_avx512_unaligned_erms)
1242 __mempcpy_chk_evex_unaligned)
1245 __mempcpy_chk_evex_unaligned_erms)
1248 __mempcpy_chk_avx_unaligned)
1251 __mempcpy_chk_avx_unaligned_erms)
1255 __mempcpy_chk_avx_unaligned_rtm)
1259 __mempcpy_chk_avx_unaligned_erms_rtm)
1260 /* By V3 we assume fast aligned copy. */
1263 __mempcpy_chk_ssse3)
1264 /* ISA V2 wrapper for SSE2 implementation because the SSE2
1265 implementation is also used at ISA level 2 (SSSE3 is too
1266 optimized around aligned copy to be better as general
1267 purpose memmove). */
1269 __mempcpy_chk_sse2_unaligned)
1271 __mempcpy_chk_sse2_unaligned_erms))
1272 #endif
1274 /* Support sysdeps/x86_64/multiarch/mempcpy.c. */
1277 __mempcpy_erms)
1280 __mempcpy_avx512_no_vzeroupper)
1283 __mempcpy_avx512_unaligned)
1286 __mempcpy_avx512_unaligned_erms)
1289 __mempcpy_evex_unaligned)
1292 __mempcpy_evex_unaligned_erms)
1295 __mempcpy_avx_unaligned)
1298 __mempcpy_avx_unaligned_erms)
1302 __mempcpy_avx_unaligned_rtm)
1306 __mempcpy_avx_unaligned_erms_rtm)
1307 /* By V3 we assume fast aligned copy. */
1310 __mempcpy_ssse3)
1311 /* ISA V2 wrapper for SSE2 implementation because the SSE2
1312 implementation is also used at ISA level 2 (SSSE3 is too
1313 optimized around aligned copy to be better as general
1314 purpose memmove). */
1316 __mempcpy_sse2_unaligned)
1318 __mempcpy_sse2_unaligned_erms))
1320 /* Support sysdeps/x86_64/multiarch/strncmp.c. */
1326 __strncmp_evex)
1330 __strncmp_avx2)
1335 __strncmp_avx2_rtm)
1338 __strncmp_sse42)
1339 /* ISA V2 wrapper for SSE2 implementation because the SSE2
1340 implementation is also used at ISA level 2. */
1343 __strncmp_sse2))
1345 #ifdef SHARED
1346 /* Support sysdeps/x86_64/multiarch/wmemset_chk.c. */
1352 __wmemset_chk_evex_unaligned)
1357 __wmemset_chk_avx512_unaligned)
1360 __wmemset_chk_avx2_unaligned)
1364 __wmemset_chk_avx2_unaligned_rtm)
1365 /* ISA V2 wrapper for SSE2 implementation because the SSE2
1366 implementation is also used at ISA level 2. */
1368 __wmemset_chk_sse2_unaligned))
1369 #endif
1372 }