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[glibc.git] / sysdeps / x86 / nptl / pthreaddef.h
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1 /* Copyright (C) 2002-2023 Free Software Foundation, Inc.
2 This file is part of the GNU C Library.
4 The GNU C Library is free software; you can redistribute it and/or
5 modify it under the terms of the GNU Lesser General Public
6 License as published by the Free Software Foundation; either
7 version 2.1 of the License, or (at your option) any later version.
9 The GNU C Library is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 Lesser General Public License for more details.
14 You should have received a copy of the GNU Lesser General Public
15 License along with the GNU C Library; if not, see
16 <https://www.gnu.org/licenses/>. */
18 /* Default stack size. */
19 #define ARCH_STACK_DEFAULT_SIZE (2 * 1024 * 1024)
21 /* Minimum guard size. */
22 #define ARCH_MIN_GUARD_SIZE 0
24 /* Required stack pointer alignment at beginning. SSE requires 16
25 bytes. */
26 #define STACK_ALIGN 16
28 /* Minimal stack size after allocating thread descriptor and guard size. */
29 #define MINIMAL_REST_STACK 2048
31 /* Alignment requirement for TCB.
33 Some processors such as Intel Atom pay a big penalty on every
34 access using a segment override if that segment's base is not
35 aligned to the size of a cache line. (See Intel 64 and IA-32
36 Architectures Optimization Reference Manual, section 13.3.3.3,
37 "Segment Base".) On such machines, a cache line is 64 bytes. */
38 #define TCB_ALIGNMENT 64
41 /* Location of current stack frame. */
42 #ifdef __x86_64__
43 /* The frame pointer is not usable. */
44 # define CURRENT_STACK_FRAME \
45 ({ register void * p__ __asm__(RSP_REG); \
46 asm volatile("" : "=r" (p__)); \
47 p__; })
48 #else
49 # define CURRENT_STACK_FRAME __builtin_frame_address (0)
50 #endif