sysdeps/powerpc/sysdep.h

   1 /* Copyright (C) 1999-2015 Free Software Foundation, Inc.
   2    This file is part of the GNU C Library.
   3
   4    The GNU C Library is free software; you can redistribute it and/or
   5    modify it under the terms of the GNU Lesser General Public
   6    License as published by the Free Software Foundation; either
   7    version 2.1 of the License, or (at your option) any later version.
   8
   9    The GNU C Library is distributed in the hope that it will be useful,
  10    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12    Lesser General Public License for more details.
  13
  14    You should have received a copy of the GNU Lesser General Public
  15    License along with the GNU C Library; if not, see
  16    <http://www.gnu.org/licenses/>.  */
  17
  18 /*
  19  * Powerpc Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP).
  20  * This entry is copied to _dl_hwcap or rtld_global._dl_hwcap during startup.
  21  */
  22 #define _SYSDEPS_SYSDEP_H 1
  23 #include <bits/hwcap.h>
  24 #ifdef ENABLE_LOCK_ELISION
  25 #include <tls.h>
  26 #include <htm.h>
  27 #endif
  28
  29 #define PPC_FEATURE_970 (PPC_FEATURE_POWER4 + PPC_FEATURE_HAS_ALTIVEC)
  30
  31 #ifdef __ASSEMBLER__
  32
  33 /* Symbolic names for the registers.  The only portable way to write asm
  34    code is to use number but this produces really unreadable code.
  35    Therefore these symbolic names.  */
  36
  37 /* Integer registers.  */
  38 #define r0      0
  39 #define r1      1
  40 #define r2      2
  41 #define r3      3
  42 #define r4      4
  43 #define r5      5
  44 #define r6      6
  45 #define r7      7
  46 #define r8      8
  47 #define r9      9
  48 #define r10     10
  49 #define r11     11
  50 #define r12     12
  51 #define r13     13
  52 #define r14     14
  53 #define r15     15
  54 #define r16     16
  55 #define r17     17
  56 #define r18     18
  57 #define r19     19
  58 #define r20     20
  59 #define r21     21
  60 #define r22     22
  61 #define r23     23
  62 #define r24     24
  63 #define r25     25
  64 #define r26     26
  65 #define r27     27
  66 #define r28     28
  67 #define r29     29
  68 #define r30     30
  69 #define r31     31
  70
  71 /* Floating-point registers.  */
  72 #define fp0     0
  73 #define fp1     1
  74 #define fp2     2
  75 #define fp3     3
  76 #define fp4     4
  77 #define fp5     5
  78 #define fp6     6
  79 #define fp7     7
  80 #define fp8     8
  81 #define fp9     9
  82 #define fp10    10
  83 #define fp11    11
  84 #define fp12    12
  85 #define fp13    13
  86 #define fp14    14
  87 #define fp15    15
  88 #define fp16    16
  89 #define fp17    17
  90 #define fp18    18
  91 #define fp19    19
  92 #define fp20    20
  93 #define fp21    21
  94 #define fp22    22
  95 #define fp23    23
  96 #define fp24    24
  97 #define fp25    25
  98 #define fp26    26
  99 #define fp27    27
 100 #define fp28    28
 101 #define fp29    29
 102 #define fp30    30
 103 #define fp31    31
 104
 105 /* Condition code registers.  */
 106 #define cr0     0
 107 #define cr1     1
 108 #define cr2     2
 109 #define cr3     3
 110 #define cr4     4
 111 #define cr5     5
 112 #define cr6     6
 113 #define cr7     7
 114
 115 /* Vector registers. */
 116 #define v0      0
 117 #define v1      1
 118 #define v2      2
 119 #define v3      3
 120 #define v4      4
 121 #define v5      5
 122 #define v6      6
 123 #define v7      7
 124 #define v8      8
 125 #define v9      9
 126 #define v10     10
 127 #define v11     11
 128 #define v12     12
 129 #define v13     13
 130 #define v14     14
 131 #define v15     15
 132 #define v16     16
 133 #define v17     17
 134 #define v18     18
 135 #define v19     19
 136 #define v20     20
 137 #define v21     21
 138 #define v22     22
 139 #define v23     23
 140 #define v24     24
 141 #define v25     25
 142 #define v26     26
 143 #define v27     27
 144 #define v28     28
 145 #define v29     29
 146 #define v30     30
 147 #define v31     31
 148
 149 #define VRSAVE  256
 150
 151 /* The 32-bit words of a 64-bit dword are at these offsets in memory.  */
 152 #if defined __LITTLE_ENDIAN__ || defined _LITTLE_ENDIAN
 153 # define LOWORD 0
 154 # define HIWORD 4
 155 #else
 156 # define LOWORD 4
 157 # define HIWORD 0
 158 #endif
 159
 160 /* The high 16-bit word of a 64-bit dword is at this offset in memory.  */
 161 #if defined __LITTLE_ENDIAN__ || defined _LITTLE_ENDIAN
 162 # define HISHORT 6
 163 #else
 164 # define HISHORT 0
 165 #endif
 166
 167 /* This seems to always be the case on PPC.  */
 168 #define ALIGNARG(log2) log2
 169 #define ASM_SIZE_DIRECTIVE(name) .size name,.-name
 170
 171 #else
 172
 173 /* Linux kernel powerpc documentation [1] states issuing a syscall inside a
 174    transaction is not recommended and may lead to undefined behavior.  It
 175    also states syscalls do not abort transactions.  To avoid such traps,
 176    we abort transaction just before syscalls.
 177
 178    [1] Documentation/powerpc/transactional_memory.txt [Syscalls]  */
 179 #if !IS_IN(rtld) && defined (ENABLE_LOCK_ELISION)
 180 # define ABORT_TRANSACTION \
 181   ({                                            \
 182     if (THREAD_GET_TM_CAPABLE ())               \
 183       __builtin_tabort (_ABORT_SYSCALL);        \
 184   })
 185 #else
 186 # define ABORT_TRANSACTION
 187 #endif
 188
 189 #endif  /* __ASSEMBLER__ */