1 /* Optimized memmove implementation for PowerPC64/POWER7.
2 Copyright (C) 2014 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <http://www.gnu.org/licenses/>. */
22 /* void* [r3] memmove (void *dest [r3], const void *src [r4], size_t len [r5])
24 This optimization check if memory 'dest' overlaps with 'src'. If it does
25 not then it calls an optimized memcpy call (similar to memcpy for POWER7,
26 embedded here to gain some cycles).
27 If source and destiny overlaps, a optimized backwards memcpy is used
31 EALIGN (memmove, 5, 0)
37 blt cr7,L(memmove_bwd)
41 ble cr1, L(copy_LT_32) /* If move < 32 bytes use short move
46 cmpld cr6,10,11 /* SRC and DST alignments match? */
49 bne cr6,L(copy_GE_32_unaligned)
55 /* Get the DST and SRC aligned to 8 bytes (16 for little-endian). */
83 /* Main aligned copy loop. Copies 128 bytes at a time. */
99 /* for the 2nd + iteration of this loop. */
121 bdnz L(aligned_128head)
156 4: /* Copies 4~7 bytes. */
166 /* Return original DST pointer. */
169 /* Handle copies of 0~31 bytes. */
177 /* At least 9 bytes to go. */
181 beq L(copy_LT_32_aligned)
183 /* Force 4-byte alignment for SRC. */
193 bf 31,L(end_4bytes_alignment)
200 L(end_4bytes_alignment):
204 L(copy_LT_32_aligned):
205 /* At least 6 bytes to go, and SRC is word-aligned. */
219 8: /* Copy 8 bytes. */
229 /* Copies 4~7 bytes. */
240 /* Return original DST pointer. */
244 /* Copies 2~3 bytes. */
266 /* Return original DST pointer. */
269 /* Handles copies of 0~8 bytes. */
274 /* Though we could've used ld/std here, they are still
275 slow for unaligned cases. */
284 /* Handle copies of 32+ bytes where DST is aligned (to quadword) but
285 SRC is not. Use aligned quadword loads from SRC, shifted to realign
286 the data, allowing for aligned DST stores. */
288 L(copy_GE_32_unaligned):
289 clrldi 0,0,60 /* Number of bytes until the 1st r11 quadword. */
290 srdi 9,r5,4 /* Number of full quadwords remaining. */
292 beq L(copy_GE_32_unaligned_cont)
294 /* DST is not quadword aligned, get it aligned. */
299 /* Vector instructions work best when proper alignment (16-bytes)
300 is present. Move 0~15 bytes as needed to get DST quadword-aligned. */
326 srdi 9,r5,4 /* Number of full quadwords remaining. */
328 /* The proper alignment is present, it is OK to copy the bytes now. */
329 L(copy_GE_32_unaligned_cont):
331 /* Setup two indexes to speed up the indexed vector operations. */
333 li 6,16 /* Index for 16-bytes offsets. */
334 li 7,32 /* Index for 32-bytes offsets. */
336 srdi 8,r5,5 /* Setup the loop counter. */
339 #ifdef __LITTLE_ENDIAN__
346 bf 31,L(setup_unaligned_loop)
348 /* Copy another 16 bytes to align to 32-bytes due to the loop. */
350 #ifdef __LITTLE_ENDIAN__
361 L(setup_unaligned_loop):
363 ble cr6,L(end_unaligned_loop)
365 /* Copy 32 bytes at a time using vector instructions. */
369 /* Note: vr6/vr10 may contain data that was already copied,
370 but in order to get proper alignment, we may have to copy
371 some portions again. This is faster than having unaligned
372 vector instructions though. */
375 #ifdef __LITTLE_ENDIAN__
381 #ifdef __LITTLE_ENDIAN__
390 bdnz L(unaligned_loop)
395 L(end_unaligned_loop):
397 /* Check for tail bytes. */
403 /* We have 1~15 tail bytes to copy, and DST is quadword aligned. */
412 4: /* Copy 4~7 bytes. */
422 /* Return original DST pointer. */
425 /* Start to memcpy backward implementation: the algorith first check if
426 src and dest have the same alignment and if it does align both to 16
427 bytes and copy using VSX instructions.
428 If does not, align dest to 16 bytes and use VMX (altivec) instruction
429 to read two 16 bytes at time, shift/permute the bytes read and write
433 /* Copy is done backwards: update the pointers and check alignment. */
437 ble cr1, L(copy_LT_32_bwd) /* If move < 32 bytes use short move
440 andi. r10,r11,15 /* Check if r11 is aligned to 16 bytes */
441 clrldi r9,r4,60 /* Check if r4 is aligned to 16 bytes */
442 cmpld cr6,r10,r9 /* SRC and DST alignments match? */
444 bne cr6,L(copy_GE_32_unaligned_bwd)
445 beq L(aligned_copy_bwd)
450 /* Get the DST and SRC aligned to 16 bytes. */
478 /* Main aligned copy loop. Copies 128 bytes at a time. */
487 beq L(aligned_tail_bwd)
491 b L(aligned_128loop_bwd)
494 L(aligned_128head_bwd):
495 /* for the 2nd + iteration of this loop. */
498 L(aligned_128loop_bwd):
517 bdnz L(aligned_128head_bwd)
552 4: /* Copies 4~7 bytes. */
562 /* Return original DST pointer. */
565 /* Handle copies of 0~31 bytes. */
570 ble cr6,L(copy_LE_8_bwd)
572 /* At least 9 bytes to go. */
576 beq L(copy_LT_32_aligned_bwd)
578 /* Force 4-byte alignment for SRC. */
588 bf 31,L(end_4bytes_alignment_bwd)
595 L(end_4bytes_alignment_bwd):
599 L(copy_LT_32_aligned_bwd):
600 /* At least 6 bytes to go, and SRC is word-aligned. */
614 8: /* Copy 8 bytes. */
624 /* Copies 4~7 bytes. */
635 /* Return original DST pointer. */
639 /* Copies 2~3 bytes. */
661 /* Return original DST pointer. */
665 /* Handles copies of 0~8 bytes. */
670 /* Though we could've used ld/std here, they are still
671 slow for unaligned cases. */
679 /* Handle copies of 32+ bytes where DST is aligned (to quadword) but
680 SRC is not. Use aligned quadword loads from SRC, shifted to realign
681 the data, allowing for aligned DST stores. */
683 L(copy_GE_32_unaligned_bwd):
684 andi. r10,r11,15 /* Check alignment of DST against 16 bytes.. */
685 srdi r9,r5,4 /* Number of full quadwords remaining. */
687 beq L(copy_GE_32_unaligned_cont_bwd)
689 /* DST is not quadword aligned and r10 holds the address masked to
690 compare alignments. */
694 /* Vector instructions work best when proper alignment (16-bytes)
695 is present. Move 0~15 bytes as needed to get DST quadword-aligned. */
721 srdi r9,r5,4 /* Number of full quadwords remaining. */
723 /* The proper alignment is present, it is OK to copy the bytes now. */
724 L(copy_GE_32_unaligned_cont_bwd):
726 /* Setup two indexes to speed up the indexed vector operations. */
728 li r6,-16 /* Index for 16-bytes offsets. */
729 li r7,-32 /* Index for 32-bytes offsets. */
731 srdi r8,r5,5 /* Setup the loop counter. */
734 #ifdef __LITTLE_ENDIAN__
741 bf 31,L(setup_unaligned_loop_bwd)
743 /* Copy another 16 bytes to align to 32-bytes due to the loop. */
745 #ifdef __LITTLE_ENDIAN__
756 L(setup_unaligned_loop_bwd):
758 ble cr6,L(end_unaligned_loop_bwd)
760 /* Copy 32 bytes at a time using vector instructions. */
762 L(unaligned_loop_bwd):
764 /* Note: vr6/vr10 may contain data that was already copied,
765 but in order to get proper alignment, we may have to copy
766 some portions again. This is faster than having unaligned
767 vector instructions though. */
770 #ifdef __LITTLE_ENDIAN__
776 #ifdef __LITTLE_ENDIAN__
785 bdnz L(unaligned_loop_bwd)
790 L(end_unaligned_loop_bwd):
792 /* Check for tail bytes. */
798 /* We have 1~15 tail bytes to copy, and DST is quadword aligned. */
807 4: /* Copy 4~7 bytes. */
817 /* Return original DST pointer. */
819 END_GEN_TB (memmove, TB_TOCLESS)
820 libc_hidden_builtin_def (memmove)
823 /* void bcopy(const void *src [r3], void *dest [r4], size_t n [r5])
824 Implemented in this file to avoid linker create a stub function call
825 in the branch to '_memmove'. */