sysdeps/powerpc/fpu/fpu_control.h

   1 /* FPU control word definitions.  PowerPC version.
   2    Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
   3    This file is part of the GNU C Library.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Lesser General Public
   7    License as published by the Free Software Foundation; either
   8    version 2.1 of the License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Lesser General Public License for more details.
  14
  15    You should have received a copy of the GNU Lesser General Public
  16    License along with the GNU C Library; if not, see
  17    <http://www.gnu.org/licenses/>.  */
  18
  19 #ifndef _FPU_CONTROL_H
  20 #define _FPU_CONTROL_H
  21
  22 /* rounding control */
  23 #define _FPU_RC_NEAREST 0x00   /* RECOMMENDED */
  24 #define _FPU_RC_DOWN    0x03
  25 #define _FPU_RC_UP      0x02
  26 #define _FPU_RC_ZERO    0x01
  27
  28 #define _FPU_MASK_NI  0x04 /* non-ieee mode */
  29
  30 /* masking of interrupts */
  31 #define _FPU_MASK_ZM  0x10 /* zero divide */
  32 #define _FPU_MASK_OM  0x40 /* overflow */
  33 #define _FPU_MASK_UM  0x20 /* underflow */
  34 #define _FPU_MASK_XM  0x08 /* inexact */
  35 #define _FPU_MASK_IM  0x80 /* invalid operation */
  36
  37 #define _FPU_RESERVED 0xffffff00 /* These bits are reserved are not changed. */
  38
  39 /* The fdlibm code requires no interrupts for exceptions.  */
  40 #define _FPU_DEFAULT  0x00000000 /* Default value.  */
  41
  42 /* IEEE:  same as above, but (some) exceptions;
  43    we leave the 'inexact' exception off.
  44  */
  45 #define _FPU_IEEE     0x000000f0
  46
  47 /* Type of the control word.  */
  48 typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
  49
  50 /* Macros for accessing the hardware control word.  */
  51 #define _FPU_GETCW(__cw) ( { \
  52   union { double d; fpu_control_t cw[2]; } \
  53     tmp __attribute__ ((__aligned__(8))); \
  54   __asm__ ("mffs 0; stfd%U0 0,%0" : "=m" (tmp.d) : : "fr0"); \
  55   (__cw)=tmp.cw[1]; \
  56   tmp.cw[1]; } )
  57 #define _FPU_SETCW(__cw) { \
  58   union { double d; fpu_control_t cw[2]; } \
  59     tmp __attribute__ ((__aligned__(8))); \
  60   tmp.cw[0] = 0xFFF80000; /* More-or-less arbitrary; this is a QNaN. */ \
  61   tmp.cw[1] = __cw; \
  62   __asm__ ("lfd%U0 0,%0; mtfsf 255,0" : : "m" (tmp.d) : "fr0"); \
  63 }
  64
  65 /* Default control word set at startup.  */
  66 extern fpu_control_t __fpu_control;
  67
  68 #endif /* _FPU_CONTROL_H */