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[glibc.git] / sysdeps / powerpc / fpu / feupdateenv.c
blob567cc622858d23bc45f40687d2fe600a3624d27d
1 /* Install given floating-point environment and raise exceptions.
2 Copyright (C) 1997, 1999, 2000, 2001, 2007, 2008, 2010
3 Free Software Foundation, Inc.
4 This file is part of the GNU C Library.
5 Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997.
7 The GNU C Library is free software; you can redistribute it and/or
8 modify it under the terms of the GNU Lesser General Public
9 License as published by the Free Software Foundation; either
10 version 2.1 of the License, or (at your option) any later version.
12 The GNU C Library is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 Lesser General Public License for more details.
17 You should have received a copy of the GNU Lesser General Public
18 License along with the GNU C Library; if not, see
19 <http://www.gnu.org/licenses/>. */
21 #include <fenv_libc.h>
22 #include <fpu_control.h>
23 #include <bp-sym.h>
25 #define _FPU_MASK_ALL (_FPU_MASK_ZM | _FPU_MASK_OM | _FPU_MASK_UM | _FPU_MASK_XM | _FPU_MASK_IM)
27 int
28 __feupdateenv (const fenv_t *envp)
30 fenv_union_t old, new;
32 /* Save the currently set exceptions. */
33 new.fenv = *envp;
34 old.fenv = fegetenv_register ();
36 /* Restore rounding mode and exception enable from *envp and merge
37 exceptions. Leave fraction rounded/inexact and FP result/CC bits
38 unchanged. */
39 new.l[1] = (old.l[1] & 0x1FFFFF00) | (new.l[1] & 0x1FF80FFF);
41 /* If the old env has no eabled exceptions and the new env has any enabled
42 exceptions, then unmask SIGFPE in the MSR FE0/FE1 bits. This will put
43 the hardware into "precise mode" and may cause the FPU to run slower on
44 some hardware. */
45 if ((old.l[1] & _FPU_MASK_ALL) == 0 && (new.l[1] & _FPU_MASK_ALL) != 0)
46 (void)__fe_nomask_env ();
48 /* If the old env had any eabled exceptions and the new env has no enabled
49 exceptions, then mask SIGFPE in the MSR FE0/FE1 bits. This may allow the
50 FPU to run faster because it always takes the default action and can not
51 generate SIGFPE. */
52 if ((old.l[1] & _FPU_MASK_ALL) != 0 && (new.l[1] & _FPU_MASK_ALL) == 0)
53 (void)__fe_mask_env ();
55 /* Atomically enable and raise (if appropriate) exceptions set in `new'. */
56 fesetenv_register (new.fenv);
58 /* Success. */
59 return 0;
62 #include <shlib-compat.h>
63 #if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
64 strong_alias (__feupdateenv, __old_feupdateenv)
65 compat_symbol (libm, BP_SYM (__old_feupdateenv), BP_SYM (feupdateenv), GLIBC_2_1);
66 #endif
68 libm_hidden_ver (__feupdateenv, feupdateenv)
69 versioned_symbol (libm, BP_SYM (__feupdateenv), BP_SYM (feupdateenv), GLIBC_2_2);