Replace FSF snail mail address with URLs.
[glibc.git] / nptl / sysdeps / i386 / pthreaddef.h
blob4b0d123996d7b3c134349abaaeec9a8e9c2eab0e
1 /* Copyright (C) 2002,2003,2011 Free Software Foundation, Inc.
2 This file is part of the GNU C Library.
3 Contributed by Ulrich Drepper <drepper@redhat.com>, 2002.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <http://www.gnu.org/licenses/>. */
19 /* Default stack size. */
20 #define ARCH_STACK_DEFAULT_SIZE (2 * 1024 * 1024)
22 /* Required stack pointer alignment at beginning. SSE requires 16
23 bytes. */
24 #define STACK_ALIGN 16
26 /* Minimal stack size after allocating thread descriptor and guard size. */
27 #define MINIMAL_REST_STACK 2048
29 /* Alignment requirement for TCB.
31 Some processors such as Intel Atom pay a big penalty on every
32 access using a segment override if that segment's base is not
33 aligned to the size of a cache line. (See Intel 64 and IA-32
34 Architectures Optimization Reference Manual, section 13.3.3.3,
35 "Segment Base".) On such machines, a cache line is 64 bytes. */
36 #define TCB_ALIGNMENT 64
39 /* Location of current stack frame. */
40 #define CURRENT_STACK_FRAME __builtin_frame_address (0)
43 /* XXX Until we have a better place keep the definitions here. */
45 /* While there is no such syscall. */
46 #define __exit_thread_inline(val) \
47 while (1) { \
48 if (__builtin_constant_p (val) && (val) == 0) \
49 asm volatile ("xorl %%ebx, %%ebx; int $0x80" :: "a" (__NR_exit)); \
50 else \
51 asm volatile ("movl %1, %%ebx; int $0x80" \
52 :: "a" (__NR_exit), "r" (val)); \