sysdeps/mips/fpu_control.h

   1 /* FPU control word bits.  Mips version.
   2    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2006, 2008
   3    Free Software Foundation, Inc.
   4    This file is part of the GNU C Library.
   5    Contributed by Olaf Flebbe and Ralf Baechle.
   6
   7    The GNU C Library is free software; you can redistribute it and/or
   8    modify it under the terms of the GNU Lesser General Public
   9    License as published by the Free Software Foundation; either
  10    version 2.1 of the License, or (at your option) any later version.
  11
  12    The GNU C Library is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15    Lesser General Public License for more details.
  16
  17    You should have received a copy of the GNU Lesser General Public
  18    License along with the GNU C Library; if not, write to the Free
  19    Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  20    02111-1307 USA.  */
  21
  22 #ifndef _FPU_CONTROL_H
  23 #define _FPU_CONTROL_H
  24
  25 /* MIPS FPU floating point control register bits.
  26  *
  27  * 31-25  -> floating point conditions code bits 7-1.  These bits are only
  28  *           available in MIPS IV.
  29  * 24     -> flush denormalized results to zero instead of
  30  *           causing unimplemented operation exception.  This bit is only
  31  *           available for MIPS III and newer.
  32  * 23     -> Condition bit
  33  * 22-18  -> reserved (read as 0, write with 0)
  34  * 17     -> cause bit for unimplemented operation
  35  * 16     -> cause bit for invalid exception
  36  * 15     -> cause bit for division by zero exception
  37  * 14     -> cause bit for overflow exception
  38  * 13     -> cause bit for underflow exception
  39  * 12     -> cause bit for inexact exception
  40  * 11     -> enable exception for invalid exception
  41  * 10     -> enable exception for division by zero exception
  42  *  9     -> enable exception for overflow exception
  43  *  8     -> enable exception for underflow exception
  44  *  7     -> enable exception for inexact exception
  45  *  6     -> flag invalid exception
  46  *  5     -> flag division by zero exception
  47  *  4     -> flag overflow exception
  48  *  3     -> flag underflow exception
  49  *  2     -> flag inexact exception
  50  *  1-0   -> rounding control
  51  *
  52  *
  53  * Rounding Control:
  54  * 00 - rounding to nearest (RN)
  55  * 01 - rounding toward zero (RZ)
  56  * 10 - rounding (up) toward plus infinity (RP)
  57  * 11 - rounding (down)toward minus infinity (RM)
  58  */
  59
  60 #include <features.h>
  61
  62 #ifdef __mips_soft_float
  63
  64 #define _FPU_RESERVED 0xffffffff
  65 #define _FPU_DEFAULT  0x00000000
  66 typedef unsigned int fpu_control_t;
  67 #define _FPU_GETCW(cw) 0
  68 #define _FPU_SETCW(cw) do { } while (0)
  69 extern fpu_control_t __fpu_control;
  70
  71 #else /* __mips_soft_float */
  72
  73 /* masking of interrupts */
  74 #define _FPU_MASK_V     0x0800  /* Invalid operation */
  75 #define _FPU_MASK_Z     0x0400  /* Division by zero  */
  76 #define _FPU_MASK_O     0x0200  /* Overflow          */
  77 #define _FPU_MASK_U     0x0100  /* Underflow         */
  78 #define _FPU_MASK_I     0x0080  /* Inexact operation */
  79
  80 /* flush denormalized numbers to zero */
  81 #define _FPU_FLUSH_TZ   0x1000000
  82
  83 /* rounding control */
  84 #define _FPU_RC_NEAREST 0x0     /* RECOMMENDED */
  85 #define _FPU_RC_ZERO    0x1
  86 #define _FPU_RC_UP      0x2
  87 #define _FPU_RC_DOWN    0x3
  88
  89 #define _FPU_RESERVED 0xfe3c0000  /* Reserved bits in cw */
  90
  91
  92 /* The fdlibm code requires strict IEEE double precision arithmetic,
  93    and no interrupts for exceptions, rounding to nearest.  */
  94
  95 #define _FPU_DEFAULT  0x00000000
  96
  97 /* IEEE:  same as above, but exceptions */
  98 #define _FPU_IEEE     0x00000F80
  99
 100 /* Type of the control word.  */
 101 typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
 102
 103 /* Macros for accessing the hardware control word.  */
 104 #define _FPU_GETCW(cw) __asm__ volatile ("cfc1 %0,$31" : "=r" (cw))
 105 #define _FPU_SETCW(cw) __asm__ volatile ("ctc1 %0,$31" : : "r" (cw))
 106
 107 /* Default control word set at startup.  */
 108 extern fpu_control_t __fpu_control;
 109
 110 #endif /* __mips_soft_float */
 111
 112 #endif  /* fpu_control.h */