sysdeps/powerpc/sysdep.h

   1 /* Copyright (C) 1999-2018 Free Software Foundation, Inc.
   2    This file is part of the GNU C Library.
   3
   4    The GNU C Library is free software; you can redistribute it and/or
   5    modify it under the terms of the GNU Lesser General Public
   6    License as published by the Free Software Foundation; either
   7    version 2.1 of the License, or (at your option) any later version.
   8
   9    The GNU C Library is distributed in the hope that it will be useful,
  10    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12    Lesser General Public License for more details.
  13
  14    You should have received a copy of the GNU Lesser General Public
  15    License along with the GNU C Library; if not, see
  16    <http://www.gnu.org/licenses/>.  */
  17
  18 /*
  19  * Powerpc Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP).
  20  * This entry is copied to _dl_hwcap or rtld_global._dl_hwcap during startup.
  21  */
  22 #define _SYSDEPS_SYSDEP_H 1
  23 #include <bits/hwcap.h>
  24 #include <tls.h>
  25 #include <htm.h>
  26
  27 #define PPC_FEATURE_970 (PPC_FEATURE_POWER4 + PPC_FEATURE_HAS_ALTIVEC)
  28
  29 #ifdef __ASSEMBLER__
  30
  31 /* Symbolic names for the registers.  The only portable way to write asm
  32    code is to use number but this produces really unreadable code.
  33    Therefore these symbolic names.  */
  34
  35 /* Integer registers.  */
  36 #define r0      0
  37 #define r1      1
  38 #define r2      2
  39 #define r3      3
  40 #define r4      4
  41 #define r5      5
  42 #define r6      6
  43 #define r7      7
  44 #define r8      8
  45 #define r9      9
  46 #define r10     10
  47 #define r11     11
  48 #define r12     12
  49 #define r13     13
  50 #define r14     14
  51 #define r15     15
  52 #define r16     16
  53 #define r17     17
  54 #define r18     18
  55 #define r19     19
  56 #define r20     20
  57 #define r21     21
  58 #define r22     22
  59 #define r23     23
  60 #define r24     24
  61 #define r25     25
  62 #define r26     26
  63 #define r27     27
  64 #define r28     28
  65 #define r29     29
  66 #define r30     30
  67 #define r31     31
  68
  69 /* Floating-point registers.  */
  70 #define fp0     0
  71 #define fp1     1
  72 #define fp2     2
  73 #define fp3     3
  74 #define fp4     4
  75 #define fp5     5
  76 #define fp6     6
  77 #define fp7     7
  78 #define fp8     8
  79 #define fp9     9
  80 #define fp10    10
  81 #define fp11    11
  82 #define fp12    12
  83 #define fp13    13
  84 #define fp14    14
  85 #define fp15    15
  86 #define fp16    16
  87 #define fp17    17
  88 #define fp18    18
  89 #define fp19    19
  90 #define fp20    20
  91 #define fp21    21
  92 #define fp22    22
  93 #define fp23    23
  94 #define fp24    24
  95 #define fp25    25
  96 #define fp26    26
  97 #define fp27    27
  98 #define fp28    28
  99 #define fp29    29
 100 #define fp30    30
 101 #define fp31    31
 102
 103 /* Condition code registers.  */
 104 #define cr0     0
 105 #define cr1     1
 106 #define cr2     2
 107 #define cr3     3
 108 #define cr4     4
 109 #define cr5     5
 110 #define cr6     6
 111 #define cr7     7
 112
 113 /* Vector registers. */
 114 #define v0      0
 115 #define v1      1
 116 #define v2      2
 117 #define v3      3
 118 #define v4      4
 119 #define v5      5
 120 #define v6      6
 121 #define v7      7
 122 #define v8      8
 123 #define v9      9
 124 #define v10     10
 125 #define v11     11
 126 #define v12     12
 127 #define v13     13
 128 #define v14     14
 129 #define v15     15
 130 #define v16     16
 131 #define v17     17
 132 #define v18     18
 133 #define v19     19
 134 #define v20     20
 135 #define v21     21
 136 #define v22     22
 137 #define v23     23
 138 #define v24     24
 139 #define v25     25
 140 #define v26     26
 141 #define v27     27
 142 #define v28     28
 143 #define v29     29
 144 #define v30     30
 145 #define v31     31
 146
 147 #define VRSAVE  256
 148
 149 /* The 32-bit words of a 64-bit dword are at these offsets in memory.  */
 150 #if defined __LITTLE_ENDIAN__ || defined _LITTLE_ENDIAN
 151 # define LOWORD 0
 152 # define HIWORD 4
 153 #else
 154 # define LOWORD 4
 155 # define HIWORD 0
 156 #endif
 157
 158 /* The high 16-bit word of a 64-bit dword is at this offset in memory.  */
 159 #if defined __LITTLE_ENDIAN__ || defined _LITTLE_ENDIAN
 160 # define HISHORT 6
 161 #else
 162 # define HISHORT 0
 163 #endif
 164
 165 /* This seems to always be the case on PPC.  */
 166 #define ALIGNARG(log2) log2
 167 #define ASM_SIZE_DIRECTIVE(name) .size name,.-name
 168
 169 #else
 170
 171 /* Linux kernel powerpc documentation [1] states issuing a syscall inside a
 172    transaction is not recommended and may lead to undefined behavior.  It
 173    also states syscalls do not abort transactions.  To avoid such traps,
 174    we abort transaction just before syscalls.
 175
 176    [1] Documentation/powerpc/transactional_memory.txt [Syscalls]  */
 177 #if !IS_IN(rtld)
 178 # define ABORT_TRANSACTION \
 179   ({                                            \
 180     if (THREAD_GET_TM_CAPABLE ())               \
 181       __libc_tabort (_ABORT_SYSCALL);   \
 182   })
 183 #else
 184 # define ABORT_TRANSACTION
 185 #endif
 186
 187 #endif  /* __ASSEMBLER__ */