1 /* Copyright (C) 2013-2014 Free Software Foundation, Inc.
2 This file is part of the GNU C Library.
4 The GNU C Library is free software; you can redistribute it and/or
5 modify it under the terms of the GNU Lesser General Public
6 License as published by the Free Software Foundation; either
7 version 2.1 of the License, or (at your option) any later version.
9 The GNU C Library is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 Lesser General Public License for more details.
14 You should have received a copy of the GNU Lesser General Public
15 License along with the GNU C Library. If not, see
16 <http://www.gnu.org/licenses/>. */
18 #ifdef ANDROID_CHANGES
19 # include "machine/asm.h"
20 # include "machine/regdef.h"
21 # define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
26 # define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
27 #elif _COMPILING_NEWLIB
28 # include "machine/asm.h"
29 # include "machine/regdef.h"
30 # define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
36 /* Check to see if the MIPS architecture we are compiling for supports
39 #if (__mips == 4) || (__mips == 5) || (__mips == 32) || (__mips == 64)
40 # ifndef DISABLE_PREFETCH
45 #if defined(_MIPS_SIM) && ((_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32))
46 # ifndef DISABLE_DOUBLE
52 # ifndef DISABLE_DOUBLE_ALIGN
57 /* Some asm.h files do not have the L macro definition. */
59 # if _MIPS_SIM == _ABIO32
60 # define L(label) $L ## label
62 # define L(label) .L ## label
66 /* Some asm.h files do not have the PTR_ADDIU macro definition. */
69 # define PTR_ADDIU daddiu
71 # define PTR_ADDIU addiu
75 /* Using PREFETCH_HINT_PREPAREFORSTORE instead of PREFETCH_STORE
76 or PREFETCH_STORE_STREAMED offers a large performance advantage
77 but PREPAREFORSTORE has some special restrictions to consider.
79 Prefetch with the 'prepare for store' hint does not copy a memory
80 location into the cache, it just allocates a cache line and zeros
81 it out. This means that if you do not write to the entire cache
82 line before writing it out to memory some data will get zero'ed out
83 when the cache line is written back to memory and data will be lost.
85 There are ifdef'ed sections of this memcpy to make sure that it does not
86 do prefetches on cache lines that are not going to be completely written.
87 This code is only needed and only used when PREFETCH_STORE_HINT is set to
88 PREFETCH_HINT_PREPAREFORSTORE. This code assumes that cache lines are
89 less than MAX_PREFETCH_SIZE bytes and if the cache line is larger it will
90 not work correctly. */
93 # define PREFETCH_HINT_STORE 1
94 # define PREFETCH_HINT_STORE_STREAMED 5
95 # define PREFETCH_HINT_STORE_RETAINED 7
96 # define PREFETCH_HINT_PREPAREFORSTORE 30
98 /* If we have not picked out what hints to use at this point use the
99 standard load and store prefetch hints. */
100 # ifndef PREFETCH_STORE_HINT
101 # define PREFETCH_STORE_HINT PREFETCH_HINT_STORE
104 /* We double everything when USE_DOUBLE is true so we do 2 prefetches to
105 get 64 bytes in that case. The assumption is that each individual
106 prefetch brings in 32 bytes. */
108 # define PREFETCH_CHUNK 64
109 # define PREFETCH_FOR_STORE(chunk, reg) \
110 pref PREFETCH_STORE_HINT, (chunk)*64(reg); \
111 pref PREFETCH_STORE_HINT, ((chunk)*64)+32(reg)
113 # define PREFETCH_CHUNK 32
114 # define PREFETCH_FOR_STORE(chunk, reg) \
115 pref PREFETCH_STORE_HINT, (chunk)*32(reg)
118 /* MAX_PREFETCH_SIZE is the maximum size of a prefetch, it must not be less
119 than PREFETCH_CHUNK, the assumed size of each prefetch. If the real size
120 of a prefetch is greater than MAX_PREFETCH_SIZE and the PREPAREFORSTORE
121 hint is used, the code will not work correctly. If PREPAREFORSTORE is not
122 used than MAX_PREFETCH_SIZE does not matter. */
123 # define MAX_PREFETCH_SIZE 128
124 /* PREFETCH_LIMIT is set based on the fact that we never use an offset greater
125 than 5 on a STORE prefetch and that a single prefetch can never be larger
126 than MAX_PREFETCH_SIZE. We add the extra 32 when USE_DOUBLE is set because
127 we actually do two prefetches in that case, one 32 bytes after the other. */
129 # define PREFETCH_LIMIT (5 * PREFETCH_CHUNK) + 32 + MAX_PREFETCH_SIZE
131 # define PREFETCH_LIMIT (5 * PREFETCH_CHUNK) + MAX_PREFETCH_SIZE
134 # if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE) \
135 && ((PREFETCH_CHUNK * 4) < MAX_PREFETCH_SIZE)
136 /* We cannot handle this because the initial prefetches may fetch bytes that
137 are before the buffer being copied. We start copies with an offset
138 of 4 so avoid this situation when using PREPAREFORSTORE. */
139 # error "PREFETCH_CHUNK is too large and/or MAX_PREFETCH_SIZE is too small."
141 #else /* USE_PREFETCH not defined */
142 # define PREFETCH_FOR_STORE(offset, reg)
145 /* Allow the routine to be named something else if desired. */
147 # define MEMSET_NAME memset
150 /* We load/store 64 bits at a time when USE_DOUBLE is true.
151 The C_ prefix stands for CHUNK and is used to avoid macro name
152 conflicts with system header files. */
157 # define C_STHI sdl /* high part is left in big-endian */
159 # define C_STHI sdr /* high part is right in little-endian */
164 # define C_STHI swl /* high part is left in big-endian */
166 # define C_STHI swr /* high part is right in little-endian */
170 /* Bookkeeping values for 32 vs. 64 bit mode. */
173 # define NSIZEMASK 0x3f
174 # define NSIZEDMASK 0x7f
177 # define NSIZEMASK 0x1f
178 # define NSIZEDMASK 0x3f
180 #define UNIT(unit) ((unit)*NSIZE)
181 #define UNITM1(unit) (((unit)*NSIZE)-1)
183 #ifdef ANDROID_CHANGES
191 /* If the size is less than 2*NSIZE (8 or 16), go to L(lastb). Regardless of
192 size, copy dst pointer to v0 for the return value. */
193 slti t2,a2,(2 * NSIZE)
197 /* If memset value is not zero, we copy it to all the bytes in a 32 or 64
199 beq a1,zero,L(set0) /* If memset value is zero no smear */
203 /* smear byte into 32 or 64 bit word */
204 #if ((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2)
206 dins a1, a1, 8, 8 /* Replicate fill byte into half-word. */
207 dins a1, a1, 16, 16 /* Replicate fill byte into word. */
208 dins a1, a1, 32, 32 /* Replicate fill byte into dbl word. */
210 ins a1, a1, 8, 8 /* Replicate fill byte into half-word. */
211 ins a1, a1, 16, 16 /* Replicate fill byte into word. */
231 /* If the destination address is not aligned do a partial store to get it
232 aligned. If it is already aligned just jump to L(aligned). */
234 andi t2,a3,(NSIZE-1) /* word-unaligned address? */
235 beq t2,zero,L(aligned) /* t2 is the unalignment count */
241 /* If USE_DOUBLE is not set we may still want to align the data on a 16
242 byte boundry instead of an 8 byte boundry to maximize the opportunity
243 of proAptiv chips to do memory bonding (combining two sequential 4
244 byte stores into one 8 byte store). We know there are at least 4 bytes
245 left to store or we would have jumped to L(lastb) earlier in the code. */
248 beq t2,zero,L(double_aligned)
255 /* Now the destination is aligned to (word or double word) aligned address
256 Set a2 to count how many bytes we have to copy after all the 64/128 byte
257 chunks are copied and a3 to the dest pointer after all the 64/128 byte
258 chunks have been copied. We will loop, incrementing a0 until it equals
260 andi t8,a2,NSIZEDMASK /* any whole 64-byte/128-byte chunks? */
261 beq a2,t8,L(chkw) /* if a2==t8, no 64-byte/128-byte chunks */
262 PTR_SUBU a3,a2,t8 /* subtract from a2 the reminder */
263 PTR_ADDU a3,a0,a3 /* Now a3 is the final dst after loop */
265 /* When in the loop we may prefetch with the 'prepare to store' hint,
266 in this case the a0+x should not be past the "t0-32" address. This
267 means: for x=128 the last "safe" a0 address is "t0-160". Alternatively,
268 for x=64 the last "safe" a0 address is "t0-96" In the current version we
269 will use "prefetch hint,128(a0)", so "t0-160" is the limit. */
270 #if defined(USE_PREFETCH) \
271 && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
272 PTR_ADDU t0,a0,a2 /* t0 is the "past the end" address */
273 PTR_SUBU t9,t0,PREFETCH_LIMIT /* t9 is the "last safe pref" address */
275 #if defined(USE_PREFETCH) \
276 && (PREFETCH_STORE_HINT != PREFETCH_HINT_PREPAREFORSTORE)
277 PREFETCH_FOR_STORE (1, a0)
278 PREFETCH_FOR_STORE (2, a0)
279 PREFETCH_FOR_STORE (3, a0)
283 #if defined(USE_PREFETCH) \
284 && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
285 sltu v1,t9,a0 /* If a0 > t9 don't use next prefetch */
289 PREFETCH_FOR_STORE (4, a0)
290 PREFETCH_FOR_STORE (5, a0)
308 PTR_ADDIU a0,a0,UNIT(16) /* adding 64/128 to dest */
313 /* Here we have dest word-aligned but less than 64-bytes or 128 bytes to go.
314 Check for a 32(64) byte chunk and copy if if there is one. Otherwise
315 jump down to L(chk1w) to handle the tail end of the copy. */
317 andi t8,a2,NSIZEMASK /* is there a 32-byte/64-byte chunk. */
318 /* the t8 is the reminder count past 32-bytes */
319 beq a2,t8,L(chk1w)/* when a2==t8, no 32-byte chunk */
329 PTR_ADDIU a0,a0,UNIT(8)
331 /* Here we have less than 32(64) bytes to set. Set up for a loop to
332 copy one word (or double word) at a time. Set a2 to count how many
333 bytes we have to copy after all the word (or double word) chunks are
334 copied and a3 to the dest pointer after all the (d)word chunks have
335 been copied. We will loop, incrementing a0 until a0 equals a3. */
337 andi a2,t8,(NSIZE-1) /* a2 is the reminder past one (d)word chunks */
339 PTR_SUBU a3,t8,a2 /* a3 is count of bytes in one (d)word chunks */
340 PTR_ADDU a3,a0,a3 /* a3 is the dst address after loop */
342 /* copying in words (4-byte or 8 byte chunks) */
344 PTR_ADDIU a0,a0,UNIT(1)
345 bne a0,a3,L(wordCopy_loop)
348 /* Copy the last 8 (or 16) bytes */
351 PTR_ADDU a3,a0,a2 /* a3 is the last dst address */
354 bne a0,a3,L(lastbloop)
363 #ifndef ANDROID_CHANGES
365 libc_hidden_builtin_def (MEMSET_NAME)