sysdeps/i386/fpu/fesetmode.c

   1 /* Install given floating-point control modes.  i386 version.
   2    Copyright (C) 2016-2017 Free Software Foundation, Inc.
   3    This file is part of the GNU C Library.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Lesser General Public
   7    License as published by the Free Software Foundation; either
   8    version 2.1 of the License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Lesser General Public License for more details.
  14
  15    You should have received a copy of the GNU Lesser General Public
  16    License along with the GNU C Library; if not, see
  17    <http://www.gnu.org/licenses/>.  */
  18
  19 #include <fenv.h>
  20 #include <fpu_control.h>
  21 #include <unistd.h>
  22 #include <ldsodefs.h>
  23 #include <dl-procinfo.h>
  24
  25 /* All exceptions, including the x86-specific "denormal operand"
  26    exception.  */
  27 #define FE_ALL_EXCEPT_X86 (FE_ALL_EXCEPT | __FE_DENORM)
  28
  29 int
  30 fesetmode (const femode_t *modep)
  31 {
  32   fpu_control_t cw;
  33   if (modep == FE_DFL_MODE)
  34     cw = _FPU_DEFAULT;
  35   else
  36     cw = modep->__control_word;
  37   _FPU_SETCW (cw);
  38   if (HAS_CPU_FEATURE (SSE))
  39     {
  40       unsigned int mxcsr;
  41       __asm__ ("stmxcsr %0" : "=m" (mxcsr));
  42       /* Preserve SSE exception flags but restore other state in
  43          MXCSR.  */
  44       mxcsr &= FE_ALL_EXCEPT_X86;
  45       if (modep == FE_DFL_MODE)
  46         /* Default MXCSR state has all bits zero except for those
  47            masking exceptions.  */
  48         mxcsr |= FE_ALL_EXCEPT_X86 << 7;
  49       else
  50         mxcsr |= modep->__mxcsr & ~FE_ALL_EXCEPT_X86;
  51       __asm__ ("ldmxcsr %0" : : "m" (mxcsr));
  52     }
  53   return 0;
  54 }