Fix spelling errors in sysdeps/powerpc files.
[glibc.git] / sysdeps / powerpc / fpu / feupdateenv.c
blob66f28263982fc2154a40a014f8422ac4645ef4f4
1 /* Install given floating-point environment and raise exceptions.
2 Copyright (C) 1997-2013 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
4 Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997.
6 The GNU C Library is free software; you can redistribute it and/or
7 modify it under the terms of the GNU Lesser General Public
8 License as published by the Free Software Foundation; either
9 version 2.1 of the License, or (at your option) any later version.
11 The GNU C Library is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 Lesser General Public License for more details.
16 You should have received a copy of the GNU Lesser General Public
17 License along with the GNU C Library; if not, see
18 <http://www.gnu.org/licenses/>. */
20 #include <fenv_libc.h>
21 #include <fpu_control.h>
22 #include <bp-sym.h>
24 #define _FPU_MASK_ALL (_FPU_MASK_ZM | _FPU_MASK_OM | _FPU_MASK_UM | _FPU_MASK_XM | _FPU_MASK_IM)
26 int
27 __feupdateenv (const fenv_t *envp)
29 fenv_union_t old, new;
31 /* Save the currently set exceptions. */
32 new.fenv = *envp;
33 old.fenv = fegetenv_register ();
35 /* Restore rounding mode and exception enable from *envp and merge
36 exceptions. Leave fraction rounded/inexact and FP result/CC bits
37 unchanged. */
38 new.l[1] = (old.l[1] & 0x1FFFFF00) | (new.l[1] & 0x1FF80FFF);
40 /* If the old env has no enabled exceptions and the new env has any enabled
41 exceptions, then unmask SIGFPE in the MSR FE0/FE1 bits. This will put
42 the hardware into "precise mode" and may cause the FPU to run slower on
43 some hardware. */
44 if ((old.l[1] & _FPU_MASK_ALL) == 0 && (new.l[1] & _FPU_MASK_ALL) != 0)
45 (void)__fe_nomask_env ();
47 /* If the old env had any enabled exceptions and the new env has no enabled
48 exceptions, then mask SIGFPE in the MSR FE0/FE1 bits. This may allow the
49 FPU to run faster because it always takes the default action and can not
50 generate SIGFPE. */
51 if ((old.l[1] & _FPU_MASK_ALL) != 0 && (new.l[1] & _FPU_MASK_ALL) == 0)
52 (void)__fe_mask_env ();
54 /* Atomically enable and raise (if appropriate) exceptions set in `new'. */
55 fesetenv_register (new.fenv);
57 /* Success. */
58 return 0;
61 #include <shlib-compat.h>
62 #if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
63 strong_alias (__feupdateenv, __old_feupdateenv)
64 compat_symbol (libm, BP_SYM (__old_feupdateenv), BP_SYM (feupdateenv), GLIBC_2_1);
65 #endif
67 libm_hidden_ver (__feupdateenv, feupdateenv)
68 versioned_symbol (libm, BP_SYM (__feupdateenv), BP_SYM (feupdateenv), GLIBC_2_2);