2 * @(#)sparc.gcc 10.1 (Sleepycat) 4/12/97
4 * The ldstub instruction takes the location specified by its first argument
5 * (a register containing a memory address) and loads its contents into its
6 * second argument (a register) and atomically sets the contents the location
7 * specified by its first argument to a byte of 1s. (The value in the second
8 * argument is never read, but only overwritten.)
10 * The membar instructions are needed to ensure that writes to the lock are
11 * correctly ordered with writes that occur later in the instruction stream.
13 * For gcc/sparc, 0 is clear, 1 is set.
16 #if defined(__sparcv9__)
17 Does the following code need membar instructions for V9 processors?
20 #define TSL_SET(tsl) ({ \
21 register tsl_t *__l = (tsl); \
25 : "=r"( __r) : "r" (__l)); \
29 #define TSL_UNSET(tsl) ({ \
30 register tsl_t *__l = (tsl); \
31 __asm__ volatile ("stb %%g0,[%0]" : : "r" (__l)); \
33 #define TSL_INIT(tsl) TSL_UNSET(tsl)