sysdeps/x86_64/dl-trampoline.h

   1 /* PLT trampolines.  x86-64 version.
   2    Copyright (C) 2009-2016 Free Software Foundation, Inc.
   3    This file is part of the GNU C Library.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Lesser General Public
   7    License as published by the Free Software Foundation; either
   8    version 2.1 of the License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Lesser General Public License for more details.
  14
  15    You should have received a copy of the GNU Lesser General Public
  16    License along with the GNU C Library; if not, see
  17    <http://www.gnu.org/licenses/>.  */
  18
  19 #undef REGISTER_SAVE_AREA_RAW
  20 #ifdef __ILP32__
  21 /* X32 saves RCX, RDX, RSI, RDI, R8 and R9 plus RAX as well as VEC0 to
  22    VEC7.  */
  23 # define REGISTER_SAVE_AREA_RAW (8 * 7 + VEC_SIZE * 8)
  24 #else
  25 /* X86-64 saves RCX, RDX, RSI, RDI, R8 and R9 plus RAX as well as
  26    BND0, BND1, BND2, BND3 and VEC0 to VEC7. */
  27 # define REGISTER_SAVE_AREA_RAW (8 * 7 + 16 * 4 + VEC_SIZE * 8)
  28 #endif
  29
  30 #undef REGISTER_SAVE_AREA
  31 #undef LOCAL_STORAGE_AREA
  32 #undef BASE
  33 #if DL_RUNTIME_RESOLVE_REALIGN_STACK
  34 # define REGISTER_SAVE_AREA     (REGISTER_SAVE_AREA_RAW + 8)
  35 /* Local stack area before jumping to function address: RBX.  */
  36 # define LOCAL_STORAGE_AREA     8
  37 # define BASE                   rbx
  38 # if (REGISTER_SAVE_AREA % VEC_SIZE) != 0
  39 #  error REGISTER_SAVE_AREA must be multples of VEC_SIZE
  40 # endif
  41 #else
  42 # define REGISTER_SAVE_AREA     REGISTER_SAVE_AREA_RAW
  43 /* Local stack area before jumping to function address:  All saved
  44    registers.  */
  45 # define LOCAL_STORAGE_AREA     REGISTER_SAVE_AREA
  46 # define BASE                   rsp
  47 # if (REGISTER_SAVE_AREA % 16) != 8
  48 #  error REGISTER_SAVE_AREA must be odd multples of 8
  49 # endif
  50 #endif
  51
  52         .text
  53         .globl _dl_runtime_resolve
  54         .hidden _dl_runtime_resolve
  55         .type _dl_runtime_resolve, @function
  56         .align 16
  57         cfi_startproc
  58 _dl_runtime_resolve:
  59         cfi_adjust_cfa_offset(16) # Incorporate PLT
  60 #if DL_RUNTIME_RESOLVE_REALIGN_STACK
  61 # if LOCAL_STORAGE_AREA != 8
  62 #  error LOCAL_STORAGE_AREA must be 8
  63 # endif
  64         pushq %rbx                      # push subtracts stack by 8.
  65         cfi_adjust_cfa_offset(8)
  66         cfi_rel_offset(%rbx, 0)
  67         mov %RSP_LP, %RBX_LP
  68         cfi_def_cfa_register(%rbx)
  69         and $-VEC_SIZE, %RSP_LP
  70 #endif
  71         sub $REGISTER_SAVE_AREA, %RSP_LP
  72 #if !DL_RUNTIME_RESOLVE_REALIGN_STACK
  73         cfi_adjust_cfa_offset(REGISTER_SAVE_AREA)
  74 #endif
  75         # Preserve registers otherwise clobbered.
  76         movq %rax, REGISTER_SAVE_RAX(%rsp)
  77         movq %rcx, REGISTER_SAVE_RCX(%rsp)
  78         movq %rdx, REGISTER_SAVE_RDX(%rsp)
  79         movq %rsi, REGISTER_SAVE_RSI(%rsp)
  80         movq %rdi, REGISTER_SAVE_RDI(%rsp)
  81         movq %r8, REGISTER_SAVE_R8(%rsp)
  82         movq %r9, REGISTER_SAVE_R9(%rsp)
  83         VMOV %VEC(0), (REGISTER_SAVE_VEC_OFF)(%rsp)
  84         VMOV %VEC(1), (REGISTER_SAVE_VEC_OFF + VEC_SIZE)(%rsp)
  85         VMOV %VEC(2), (REGISTER_SAVE_VEC_OFF + VEC_SIZE * 2)(%rsp)
  86         VMOV %VEC(3), (REGISTER_SAVE_VEC_OFF + VEC_SIZE * 3)(%rsp)
  87         VMOV %VEC(4), (REGISTER_SAVE_VEC_OFF + VEC_SIZE * 4)(%rsp)
  88         VMOV %VEC(5), (REGISTER_SAVE_VEC_OFF + VEC_SIZE * 5)(%rsp)
  89         VMOV %VEC(6), (REGISTER_SAVE_VEC_OFF + VEC_SIZE * 6)(%rsp)
  90         VMOV %VEC(7), (REGISTER_SAVE_VEC_OFF + VEC_SIZE * 7)(%rsp)
  91 #ifndef __ILP32__
  92         # We also have to preserve bound registers.  These are nops if
  93         # Intel MPX isn't available or disabled.
  94 # ifdef HAVE_MPX_SUPPORT
  95         bndmov %bnd0, REGISTER_SAVE_BND0(%rsp)
  96         bndmov %bnd1, REGISTER_SAVE_BND1(%rsp)
  97         bndmov %bnd2, REGISTER_SAVE_BND2(%rsp)
  98         bndmov %bnd3, REGISTER_SAVE_BND3(%rsp)
  99 # else
 100 #  if REGISTER_SAVE_BND0 == 0
 101         .byte 0x66,0x0f,0x1b,0x04,0x24
 102 #  else
 103         .byte 0x66,0x0f,0x1b,0x44,0x24,REGISTER_SAVE_BND0
 104 #  endif
 105         .byte 0x66,0x0f,0x1b,0x4c,0x24,REGISTER_SAVE_BND1
 106         .byte 0x66,0x0f,0x1b,0x54,0x24,REGISTER_SAVE_BND2
 107         .byte 0x66,0x0f,0x1b,0x5c,0x24,REGISTER_SAVE_BND3
 108 # endif
 109 #endif
 110         # Copy args pushed by PLT in register.
 111         # %rdi: link_map, %rsi: reloc_index
 112         mov (LOCAL_STORAGE_AREA + 8)(%BASE), %RSI_LP
 113         mov LOCAL_STORAGE_AREA(%BASE), %RDI_LP
 114         call _dl_fixup          # Call resolver.
 115         mov %RAX_LP, %R11_LP    # Save return value
 116 #ifndef __ILP32__
 117         # Restore bound registers.  These are nops if Intel MPX isn't
 118         # avaiable or disabled.
 119 # ifdef HAVE_MPX_SUPPORT
 120         bndmov REGISTER_SAVE_BND3(%rsp), %bnd3
 121         bndmov REGISTER_SAVE_BND2(%rsp), %bnd2
 122         bndmov REGISTER_SAVE_BND1(%rsp), %bnd1
 123         bndmov REGISTER_SAVE_BND0(%rsp), %bnd0
 124 # else
 125         .byte 0x66,0x0f,0x1a,0x5c,0x24,REGISTER_SAVE_BND3
 126         .byte 0x66,0x0f,0x1a,0x54,0x24,REGISTER_SAVE_BND2
 127         .byte 0x66,0x0f,0x1a,0x4c,0x24,REGISTER_SAVE_BND1
 128 #  if REGISTER_SAVE_BND0 == 0
 129         .byte 0x66,0x0f,0x1a,0x04,0x24
 130 #  else
 131         .byte 0x66,0x0f,0x1a,0x44,0x24,REGISTER_SAVE_BND0
 132 #  endif
 133 # endif
 134 #endif
 135         # Get register content back.
 136         movq REGISTER_SAVE_R9(%rsp), %r9
 137         movq REGISTER_SAVE_R8(%rsp), %r8
 138         movq REGISTER_SAVE_RDI(%rsp), %rdi
 139         movq REGISTER_SAVE_RSI(%rsp), %rsi
 140         movq REGISTER_SAVE_RDX(%rsp), %rdx
 141         movq REGISTER_SAVE_RCX(%rsp), %rcx
 142         movq REGISTER_SAVE_RAX(%rsp), %rax
 143         VMOV (REGISTER_SAVE_VEC_OFF)(%rsp), %VEC(0)
 144         VMOV (REGISTER_SAVE_VEC_OFF + VEC_SIZE)(%rsp), %VEC(1)
 145         VMOV (REGISTER_SAVE_VEC_OFF + VEC_SIZE * 2)(%rsp), %VEC(2)
 146         VMOV (REGISTER_SAVE_VEC_OFF + VEC_SIZE * 3)(%rsp), %VEC(3)
 147         VMOV (REGISTER_SAVE_VEC_OFF + VEC_SIZE * 4)(%rsp), %VEC(4)
 148         VMOV (REGISTER_SAVE_VEC_OFF + VEC_SIZE * 5)(%rsp), %VEC(5)
 149         VMOV (REGISTER_SAVE_VEC_OFF + VEC_SIZE * 6)(%rsp), %VEC(6)
 150         VMOV (REGISTER_SAVE_VEC_OFF + VEC_SIZE * 7)(%rsp), %VEC(7)
 151 #if DL_RUNTIME_RESOLVE_REALIGN_STACK
 152         mov %RBX_LP, %RSP_LP
 153         cfi_def_cfa_register(%rsp)
 154         movq (%rsp), %rbx
 155         cfi_restore(%rbx)
 156 #endif
 157         # Adjust stack(PLT did 2 pushes)
 158         add $(LOCAL_STORAGE_AREA + 16), %RSP_LP
 159         cfi_adjust_cfa_offset(-(LOCAL_STORAGE_AREA + 16))
 160         # Preserve bound registers.
 161         PRESERVE_BND_REGS_PREFIX
 162         jmp *%r11               # Jump to function address.
 163         cfi_endproc
 164         .size _dl_runtime_resolve, .-_dl_runtime_resolve
 165
 166
 167 #ifndef PROF
 168 # if (LR_VECTOR_OFFSET % VEC_SIZE) != 0
 169 #  error LR_VECTOR_OFFSET must be multples of VEC_SIZE
 170 # endif
 171
 172         .globl _dl_runtime_profile
 173         .hidden _dl_runtime_profile
 174         .type _dl_runtime_profile, @function
 175         .align 16
 176 _dl_runtime_profile:
 177         cfi_startproc
 178         cfi_adjust_cfa_offset(16) # Incorporate PLT
 179         /* The La_x86_64_regs data structure pointed to by the
 180            fourth paramater must be VEC_SIZE-byte aligned.  This must
 181            be explicitly enforced.  We have the set up a dynamically
 182            sized stack frame.  %rbx points to the top half which
 183            has a fixed size and preserves the original stack pointer.  */
 184
 185         sub $32, %RSP_LP        # Allocate the local storage.
 186         cfi_adjust_cfa_offset(32)
 187         movq %rbx, (%rsp)
 188         cfi_rel_offset(%rbx, 0)
 189
 190         /* On the stack:
 191                 56(%rbx)        parameter #1
 192                 48(%rbx)        return address
 193
 194                 40(%rbx)        reloc index
 195                 32(%rbx)        link_map
 196
 197                 24(%rbx)        La_x86_64_regs pointer
 198                 16(%rbx)        framesize
 199                  8(%rbx)        rax
 200                   (%rbx)        rbx
 201         */
 202
 203         movq %rax, 8(%rsp)
 204         mov %RSP_LP, %RBX_LP
 205         cfi_def_cfa_register(%rbx)
 206
 207         /* Actively align the La_x86_64_regs structure.  */
 208         and $-VEC_SIZE, %RSP_LP
 209         /* sizeof(La_x86_64_regs).  Need extra space for 8 SSE registers
 210            to detect if any xmm0-xmm7 registers are changed by audit
 211            module.  */
 212         sub $(LR_SIZE + XMM_SIZE*8), %RSP_LP
 213         movq %rsp, 24(%rbx)
 214
 215         /* Fill the La_x86_64_regs structure.  */
 216         movq %rdx, LR_RDX_OFFSET(%rsp)
 217         movq %r8,  LR_R8_OFFSET(%rsp)
 218         movq %r9,  LR_R9_OFFSET(%rsp)
 219         movq %rcx, LR_RCX_OFFSET(%rsp)
 220         movq %rsi, LR_RSI_OFFSET(%rsp)
 221         movq %rdi, LR_RDI_OFFSET(%rsp)
 222         movq %rbp, LR_RBP_OFFSET(%rsp)
 223
 224         lea 48(%rbx), %RAX_LP
 225         movq %rax, LR_RSP_OFFSET(%rsp)
 226
 227         /* We always store the XMM registers even if AVX is available.
 228            This is to provide backward binary compatibility for existing
 229            audit modules.  */
 230         movaps %xmm0,              (LR_XMM_OFFSET)(%rsp)
 231         movaps %xmm1, (LR_XMM_OFFSET +   XMM_SIZE)(%rsp)
 232         movaps %xmm2, (LR_XMM_OFFSET + XMM_SIZE*2)(%rsp)
 233         movaps %xmm3, (LR_XMM_OFFSET + XMM_SIZE*3)(%rsp)
 234         movaps %xmm4, (LR_XMM_OFFSET + XMM_SIZE*4)(%rsp)
 235         movaps %xmm5, (LR_XMM_OFFSET + XMM_SIZE*5)(%rsp)
 236         movaps %xmm6, (LR_XMM_OFFSET + XMM_SIZE*6)(%rsp)
 237         movaps %xmm7, (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp)
 238
 239 # ifndef __ILP32__
 240 #  ifdef HAVE_MPX_SUPPORT
 241         bndmov %bnd0,              (LR_BND_OFFSET)(%rsp)  # Preserve bound
 242         bndmov %bnd1, (LR_BND_OFFSET +   BND_SIZE)(%rsp)  # registers. Nops if
 243         bndmov %bnd2, (LR_BND_OFFSET + BND_SIZE*2)(%rsp)  # MPX not available
 244         bndmov %bnd3, (LR_BND_OFFSET + BND_SIZE*3)(%rsp)  # or disabled.
 245 #  else
 246         .byte 0x66,0x0f,0x1b,0x84,0x24;.long (LR_BND_OFFSET)
 247         .byte 0x66,0x0f,0x1b,0x8c,0x24;.long (LR_BND_OFFSET + BND_SIZE)
 248         .byte 0x66,0x0f,0x1b,0x94,0x24;.long (LR_BND_OFFSET + BND_SIZE*2)
 249         .byte 0x66,0x0f,0x1b,0x9c,0x24;.long (LR_BND_OFFSET + BND_SIZE*3)
 250 #  endif
 251 # endif
 252
 253 # ifdef RESTORE_AVX
 254         /* This is to support AVX audit modules.  */
 255         VMOVA %VEC(0),                (LR_VECTOR_OFFSET)(%rsp)
 256         VMOVA %VEC(1), (LR_VECTOR_OFFSET +   VECTOR_SIZE)(%rsp)
 257         VMOVA %VEC(2), (LR_VECTOR_OFFSET + VECTOR_SIZE*2)(%rsp)
 258         VMOVA %VEC(3), (LR_VECTOR_OFFSET + VECTOR_SIZE*3)(%rsp)
 259         VMOVA %VEC(4), (LR_VECTOR_OFFSET + VECTOR_SIZE*4)(%rsp)
 260         VMOVA %VEC(5), (LR_VECTOR_OFFSET + VECTOR_SIZE*5)(%rsp)
 261         VMOVA %VEC(6), (LR_VECTOR_OFFSET + VECTOR_SIZE*6)(%rsp)
 262         VMOVA %VEC(7), (LR_VECTOR_OFFSET + VECTOR_SIZE*7)(%rsp)
 263
 264         /* Save xmm0-xmm7 registers to detect if any of them are
 265            changed by audit module.  */
 266         vmovdqa %xmm0,              (LR_SIZE)(%rsp)
 267         vmovdqa %xmm1, (LR_SIZE +   XMM_SIZE)(%rsp)
 268         vmovdqa %xmm2, (LR_SIZE + XMM_SIZE*2)(%rsp)
 269         vmovdqa %xmm3, (LR_SIZE + XMM_SIZE*3)(%rsp)
 270         vmovdqa %xmm4, (LR_SIZE + XMM_SIZE*4)(%rsp)
 271         vmovdqa %xmm5, (LR_SIZE + XMM_SIZE*5)(%rsp)
 272         vmovdqa %xmm6, (LR_SIZE + XMM_SIZE*6)(%rsp)
 273         vmovdqa %xmm7, (LR_SIZE + XMM_SIZE*7)(%rsp)
 274 # endif
 275
 276         mov %RSP_LP, %RCX_LP    # La_x86_64_regs pointer to %rcx.
 277         mov 48(%rbx), %RDX_LP   # Load return address if needed.
 278         mov 40(%rbx), %RSI_LP   # Copy args pushed by PLT in register.
 279         mov 32(%rbx), %RDI_LP   # %rdi: link_map, %rsi: reloc_index
 280         lea 16(%rbx), %R8_LP    # Address of framesize
 281         call _dl_profile_fixup  # Call resolver.
 282
 283         mov %RAX_LP, %R11_LP    # Save return value.
 284
 285         movq 8(%rbx), %rax      # Get back register content.
 286         movq LR_RDX_OFFSET(%rsp), %rdx
 287         movq  LR_R8_OFFSET(%rsp), %r8
 288         movq  LR_R9_OFFSET(%rsp), %r9
 289
 290         movaps              (LR_XMM_OFFSET)(%rsp), %xmm0
 291         movaps   (LR_XMM_OFFSET + XMM_SIZE)(%rsp), %xmm1
 292         movaps (LR_XMM_OFFSET + XMM_SIZE*2)(%rsp), %xmm2
 293         movaps (LR_XMM_OFFSET + XMM_SIZE*3)(%rsp), %xmm3
 294         movaps (LR_XMM_OFFSET + XMM_SIZE*4)(%rsp), %xmm4
 295         movaps (LR_XMM_OFFSET + XMM_SIZE*5)(%rsp), %xmm5
 296         movaps (LR_XMM_OFFSET + XMM_SIZE*6)(%rsp), %xmm6
 297         movaps (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp), %xmm7
 298
 299 # ifdef RESTORE_AVX
 300         /* Check if any xmm0-xmm7 registers are changed by audit
 301            module.  */
 302         vpcmpeqq (LR_SIZE)(%rsp), %xmm0, %xmm8
 303         vpmovmskb %xmm8, %esi
 304         cmpl $0xffff, %esi
 305         je 2f
 306         vmovdqa %xmm0, (LR_VECTOR_OFFSET)(%rsp)
 307         jmp 1f
 308 2:      VMOVA (LR_VECTOR_OFFSET)(%rsp), %VEC(0)
 309         vmovdqa %xmm0, (LR_XMM_OFFSET)(%rsp)
 310
 311 1:      vpcmpeqq (LR_SIZE + XMM_SIZE)(%rsp), %xmm1, %xmm8
 312         vpmovmskb %xmm8, %esi
 313         cmpl $0xffff, %esi
 314         je 2f
 315         vmovdqa %xmm1, (LR_VECTOR_OFFSET + VECTOR_SIZE)(%rsp)
 316         jmp 1f
 317 2:      VMOVA (LR_VECTOR_OFFSET + VECTOR_SIZE)(%rsp), %VEC(1)
 318         vmovdqa %xmm1, (LR_XMM_OFFSET + XMM_SIZE)(%rsp)
 319
 320 1:      vpcmpeqq (LR_SIZE + XMM_SIZE*2)(%rsp), %xmm2, %xmm8
 321         vpmovmskb %xmm8, %esi
 322         cmpl $0xffff, %esi
 323         je 2f
 324         vmovdqa %xmm2, (LR_VECTOR_OFFSET + VECTOR_SIZE*2)(%rsp)
 325         jmp 1f
 326 2:      VMOVA (LR_VECTOR_OFFSET + VECTOR_SIZE*2)(%rsp), %VEC(2)
 327         vmovdqa %xmm2, (LR_XMM_OFFSET + XMM_SIZE*2)(%rsp)
 328
 329 1:      vpcmpeqq (LR_SIZE + XMM_SIZE*3)(%rsp), %xmm3, %xmm8
 330         vpmovmskb %xmm8, %esi
 331         cmpl $0xffff, %esi
 332         je 2f
 333         vmovdqa %xmm3, (LR_VECTOR_OFFSET + VECTOR_SIZE*3)(%rsp)
 334         jmp 1f
 335 2:      VMOVA (LR_VECTOR_OFFSET + VECTOR_SIZE*3)(%rsp), %VEC(3)
 336         vmovdqa %xmm3, (LR_XMM_OFFSET + XMM_SIZE*3)(%rsp)
 337
 338 1:      vpcmpeqq (LR_SIZE + XMM_SIZE*4)(%rsp), %xmm4, %xmm8
 339         vpmovmskb %xmm8, %esi
 340         cmpl $0xffff, %esi
 341         je 2f
 342         vmovdqa %xmm4, (LR_VECTOR_OFFSET + VECTOR_SIZE*4)(%rsp)
 343         jmp 1f
 344 2:      VMOVA (LR_VECTOR_OFFSET + VECTOR_SIZE*4)(%rsp), %VEC(4)
 345         vmovdqa %xmm4, (LR_XMM_OFFSET + XMM_SIZE*4)(%rsp)
 346
 347 1:      vpcmpeqq (LR_SIZE + XMM_SIZE*5)(%rsp), %xmm5, %xmm8
 348         vpmovmskb %xmm8, %esi
 349         cmpl $0xffff, %esi
 350         je 2f
 351         vmovdqa %xmm5, (LR_VECTOR_OFFSET + VECTOR_SIZE*5)(%rsp)
 352         jmp 1f
 353 2:      VMOVA (LR_VECTOR_OFFSET + VECTOR_SIZE*5)(%rsp), %VEC(5)
 354         vmovdqa %xmm5, (LR_XMM_OFFSET + XMM_SIZE*5)(%rsp)
 355
 356 1:      vpcmpeqq (LR_SIZE + XMM_SIZE*6)(%rsp), %xmm6, %xmm8
 357         vpmovmskb %xmm8, %esi
 358         cmpl $0xffff, %esi
 359         je 2f
 360         vmovdqa %xmm6, (LR_VECTOR_OFFSET + VECTOR_SIZE*6)(%rsp)
 361         jmp 1f
 362 2:      VMOVA (LR_VECTOR_OFFSET + VECTOR_SIZE*6)(%rsp), %VEC(6)
 363         vmovdqa %xmm6, (LR_XMM_OFFSET + XMM_SIZE*6)(%rsp)
 364
 365 1:      vpcmpeqq (LR_SIZE + XMM_SIZE*7)(%rsp), %xmm7, %xmm8
 366         vpmovmskb %xmm8, %esi
 367         cmpl $0xffff, %esi
 368         je 2f
 369         vmovdqa %xmm7, (LR_VECTOR_OFFSET + VECTOR_SIZE*7)(%rsp)
 370         jmp 1f
 371 2:      VMOVA (LR_VECTOR_OFFSET + VECTOR_SIZE*7)(%rsp), %VEC(7)
 372         vmovdqa %xmm7, (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp)
 373
 374 1:
 375 # endif
 376
 377 # ifndef __ILP32__
 378 #  ifdef HAVE_MPX_SUPPORT
 379         bndmov              (LR_BND_OFFSET)(%rsp), %bnd0  # Restore bound
 380         bndmov (LR_BND_OFFSET +   BND_SIZE)(%rsp), %bnd1  # registers.
 381         bndmov (LR_BND_OFFSET + BND_SIZE*2)(%rsp), %bnd2
 382         bndmov (LR_BND_OFFSET + BND_SIZE*3)(%rsp), %bnd3
 383 #  else
 384         .byte 0x66,0x0f,0x1a,0x84,0x24;.long (LR_BND_OFFSET)
 385         .byte 0x66,0x0f,0x1a,0x8c,0x24;.long (LR_BND_OFFSET + BND_SIZE)
 386         .byte 0x66,0x0f,0x1a,0x94,0x24;.long (LR_BND_OFFSET + BND_SIZE*2)
 387         .byte 0x66,0x0f,0x1a,0x9c,0x24;.long (LR_BND_OFFSET + BND_SIZE*3)
 388 #  endif
 389 # endif
 390
 391         mov  16(%rbx), %R10_LP  # Anything in framesize?
 392         test %R10_LP, %R10_LP
 393         PRESERVE_BND_REGS_PREFIX
 394         jns 3f
 395
 396         /* There's nothing in the frame size, so there
 397            will be no call to the _dl_call_pltexit. */
 398
 399         /* Get back registers content.  */
 400         movq LR_RCX_OFFSET(%rsp), %rcx
 401         movq LR_RSI_OFFSET(%rsp), %rsi
 402         movq LR_RDI_OFFSET(%rsp), %rdi
 403
 404         mov %RBX_LP, %RSP_LP
 405         movq (%rsp), %rbx
 406         cfi_restore(%rbx)
 407         cfi_def_cfa_register(%rsp)
 408
 409         add $48, %RSP_LP        # Adjust the stack to the return value
 410                                 # (eats the reloc index and link_map)
 411         cfi_adjust_cfa_offset(-48)
 412         PRESERVE_BND_REGS_PREFIX
 413         jmp *%r11               # Jump to function address.
 414
 415 3:
 416         cfi_adjust_cfa_offset(48)
 417         cfi_rel_offset(%rbx, 0)
 418         cfi_def_cfa_register(%rbx)
 419
 420         /* At this point we need to prepare new stack for the function
 421            which has to be called.  We copy the original stack to a
 422            temporary buffer of the size specified by the 'framesize'
 423            returned from _dl_profile_fixup */
 424
 425         lea LR_RSP_OFFSET(%rbx), %RSI_LP # stack
 426         add $8, %R10_LP
 427         and $-16, %R10_LP
 428         mov %R10_LP, %RCX_LP
 429         sub %R10_LP, %RSP_LP
 430         mov %RSP_LP, %RDI_LP
 431         shr $3, %RCX_LP
 432         rep
 433         movsq
 434
 435         movq 24(%rdi), %rcx     # Get back register content.
 436         movq 32(%rdi), %rsi
 437         movq 40(%rdi), %rdi
 438
 439         PRESERVE_BND_REGS_PREFIX
 440         call *%r11
 441
 442         mov 24(%rbx), %RSP_LP   # Drop the copied stack content
 443
 444         /* Now we have to prepare the La_x86_64_retval structure for the
 445            _dl_call_pltexit.  The La_x86_64_regs is being pointed by rsp now,
 446            so we just need to allocate the sizeof(La_x86_64_retval) space on
 447            the stack, since the alignment has already been taken care of. */
 448 # ifdef RESTORE_AVX
 449         /* sizeof(La_x86_64_retval).  Need extra space for 2 SSE
 450            registers to detect if xmm0/xmm1 registers are changed
 451            by audit module.  */
 452         sub $(LRV_SIZE + XMM_SIZE*2), %RSP_LP
 453 # else
 454         sub $LRV_SIZE, %RSP_LP  # sizeof(La_x86_64_retval)
 455 # endif
 456         mov %RSP_LP, %RCX_LP    # La_x86_64_retval argument to %rcx.
 457
 458         /* Fill in the La_x86_64_retval structure.  */
 459         movq %rax, LRV_RAX_OFFSET(%rcx)
 460         movq %rdx, LRV_RDX_OFFSET(%rcx)
 461
 462         movaps %xmm0, LRV_XMM0_OFFSET(%rcx)
 463         movaps %xmm1, LRV_XMM1_OFFSET(%rcx)
 464
 465 # ifdef RESTORE_AVX
 466         /* This is to support AVX audit modules.  */
 467         VMOVA %VEC(0), LRV_VECTOR0_OFFSET(%rcx)
 468         VMOVA %VEC(1), LRV_VECTOR1_OFFSET(%rcx)
 469
 470         /* Save xmm0/xmm1 registers to detect if they are changed
 471            by audit module.  */
 472         vmovdqa %xmm0,            (LRV_SIZE)(%rcx)
 473         vmovdqa %xmm1, (LRV_SIZE + XMM_SIZE)(%rcx)
 474 # endif
 475
 476 # ifndef __ILP32__
 477 #  ifdef HAVE_MPX_SUPPORT
 478         bndmov %bnd0, LRV_BND0_OFFSET(%rcx)  # Preserve returned bounds.
 479         bndmov %bnd1, LRV_BND1_OFFSET(%rcx)
 480 #  else
 481         .byte  0x66,0x0f,0x1b,0x81;.long (LRV_BND0_OFFSET)
 482         .byte  0x66,0x0f,0x1b,0x89;.long (LRV_BND1_OFFSET)
 483 #  endif
 484 # endif
 485
 486         fstpt LRV_ST0_OFFSET(%rcx)
 487         fstpt LRV_ST1_OFFSET(%rcx)
 488
 489         movq 24(%rbx), %rdx     # La_x86_64_regs argument to %rdx.
 490         movq 40(%rbx), %rsi     # Copy args pushed by PLT in register.
 491         movq 32(%rbx), %rdi     # %rdi: link_map, %rsi: reloc_index
 492         call _dl_call_pltexit
 493
 494         /* Restore return registers.  */
 495         movq LRV_RAX_OFFSET(%rsp), %rax
 496         movq LRV_RDX_OFFSET(%rsp), %rdx
 497
 498         movaps LRV_XMM0_OFFSET(%rsp), %xmm0
 499         movaps LRV_XMM1_OFFSET(%rsp), %xmm1
 500
 501 # ifdef RESTORE_AVX
 502         /* Check if xmm0/xmm1 registers are changed by audit module.  */
 503         vpcmpeqq (LRV_SIZE)(%rsp), %xmm0, %xmm2
 504         vpmovmskb %xmm2, %esi
 505         cmpl $0xffff, %esi
 506         jne 1f
 507         VMOVA LRV_VECTOR0_OFFSET(%rsp), %VEC(0)
 508
 509 1:      vpcmpeqq (LRV_SIZE + XMM_SIZE)(%rsp), %xmm1, %xmm2
 510         vpmovmskb %xmm2, %esi
 511         cmpl $0xffff, %esi
 512         jne 1f
 513         VMOVA LRV_VECTOR1_OFFSET(%rsp), %VEC(1)
 514
 515 1:
 516 # endif
 517
 518 # ifndef __ILP32__
 519 #  ifdef HAVE_MPX_SUPPORT
 520         bndmov LRV_BND0_OFFSET(%rsp), %bnd0  # Restore bound registers.
 521         bndmov LRV_BND1_OFFSET(%rsp), %bnd1
 522 #  else
 523         .byte  0x66,0x0f,0x1a,0x84,0x24;.long (LRV_BND0_OFFSET)
 524         .byte  0x66,0x0f,0x1a,0x8c,0x24;.long (LRV_BND1_OFFSET)
 525 #  endif
 526 # endif
 527
 528         fldt LRV_ST1_OFFSET(%rsp)
 529         fldt LRV_ST0_OFFSET(%rsp)
 530
 531         mov %RBX_LP, %RSP_LP
 532         movq (%rsp), %rbx
 533         cfi_restore(%rbx)
 534         cfi_def_cfa_register(%rsp)
 535
 536         add $48, %RSP_LP        # Adjust the stack to the return value
 537                                 # (eats the reloc index and link_map)
 538         cfi_adjust_cfa_offset(-48)
 539         PRESERVE_BND_REGS_PREFIX
 540         retq
 541
 542         cfi_endproc
 543         .size _dl_runtime_profile, .-_dl_runtime_profile
 544 #endif