stash: teach 'push' (and 'create_stash') to honor pathspec
[git.git] / block-sha1 / sha1.c
blob22b125cf8c122e3a1716f34778fa5595454fe76a
1 /*
2 * SHA1 routine optimized to do word accesses rather than byte accesses,
3 * and to avoid unnecessary copies into the context array.
5 * This was initially based on the Mozilla SHA1 implementation, although
6 * none of the original Mozilla code remains.
7 */
9 /* this is only to get definitions for memcpy(), ntohl() and htonl() */
10 #include "../git-compat-util.h"
12 #include "sha1.h"
14 #if defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
17 * Force usage of rol or ror by selecting the one with the smaller constant.
18 * It _can_ generate slightly smaller code (a constant of 1 is special), but
19 * perhaps more importantly it's possibly faster on any uarch that does a
20 * rotate with a loop.
23 #define SHA_ASM(op, x, n) ({ unsigned int __res; __asm__(op " %1,%0":"=r" (__res):"i" (n), "0" (x)); __res; })
24 #define SHA_ROL(x,n) SHA_ASM("rol", x, n)
25 #define SHA_ROR(x,n) SHA_ASM("ror", x, n)
27 #else
29 #define SHA_ROT(X,l,r) (((X) << (l)) | ((X) >> (r)))
30 #define SHA_ROL(X,n) SHA_ROT(X,n,32-(n))
31 #define SHA_ROR(X,n) SHA_ROT(X,32-(n),n)
33 #endif
36 * If you have 32 registers or more, the compiler can (and should)
37 * try to change the array[] accesses into registers. However, on
38 * machines with less than ~25 registers, that won't really work,
39 * and at least gcc will make an unholy mess of it.
41 * So to avoid that mess which just slows things down, we force
42 * the stores to memory to actually happen (we might be better off
43 * with a 'W(t)=(val);asm("":"+m" (W(t))' there instead, as
44 * suggested by Artur Skawina - that will also make gcc unable to
45 * try to do the silly "optimize away loads" part because it won't
46 * see what the value will be).
48 * Ben Herrenschmidt reports that on PPC, the C version comes close
49 * to the optimized asm with this (ie on PPC you don't want that
50 * 'volatile', since there are lots of registers).
52 * On ARM we get the best code generation by forcing a full memory barrier
53 * between each SHA_ROUND, otherwise gcc happily get wild with spilling and
54 * the stack frame size simply explode and performance goes down the drain.
57 #if defined(__i386__) || defined(__x86_64__)
58 #define setW(x, val) (*(volatile unsigned int *)&W(x) = (val))
59 #elif defined(__GNUC__) && defined(__arm__)
60 #define setW(x, val) do { W(x) = (val); __asm__("":::"memory"); } while (0)
61 #else
62 #define setW(x, val) (W(x) = (val))
63 #endif
65 /* This "rolls" over the 512-bit array */
66 #define W(x) (array[(x)&15])
69 * Where do we get the source from? The first 16 iterations get it from
70 * the input data, the next mix it from the 512-bit array.
72 #define SHA_SRC(t) get_be32((unsigned char *) block + (t)*4)
73 #define SHA_MIX(t) SHA_ROL(W((t)+13) ^ W((t)+8) ^ W((t)+2) ^ W(t), 1);
75 #define SHA_ROUND(t, input, fn, constant, A, B, C, D, E) do { \
76 unsigned int TEMP = input(t); setW(t, TEMP); \
77 E += TEMP + SHA_ROL(A,5) + (fn) + (constant); \
78 B = SHA_ROR(B, 2); } while (0)
80 #define T_0_15(t, A, B, C, D, E) SHA_ROUND(t, SHA_SRC, (((C^D)&B)^D) , 0x5a827999, A, B, C, D, E )
81 #define T_16_19(t, A, B, C, D, E) SHA_ROUND(t, SHA_MIX, (((C^D)&B)^D) , 0x5a827999, A, B, C, D, E )
82 #define T_20_39(t, A, B, C, D, E) SHA_ROUND(t, SHA_MIX, (B^C^D) , 0x6ed9eba1, A, B, C, D, E )
83 #define T_40_59(t, A, B, C, D, E) SHA_ROUND(t, SHA_MIX, ((B&C)+(D&(B^C))) , 0x8f1bbcdc, A, B, C, D, E )
84 #define T_60_79(t, A, B, C, D, E) SHA_ROUND(t, SHA_MIX, (B^C^D) , 0xca62c1d6, A, B, C, D, E )
86 static void blk_SHA1_Block(blk_SHA_CTX *ctx, const void *block)
88 unsigned int A,B,C,D,E;
89 unsigned int array[16];
91 A = ctx->H[0];
92 B = ctx->H[1];
93 C = ctx->H[2];
94 D = ctx->H[3];
95 E = ctx->H[4];
97 /* Round 1 - iterations 0-16 take their input from 'block' */
98 T_0_15( 0, A, B, C, D, E);
99 T_0_15( 1, E, A, B, C, D);
100 T_0_15( 2, D, E, A, B, C);
101 T_0_15( 3, C, D, E, A, B);
102 T_0_15( 4, B, C, D, E, A);
103 T_0_15( 5, A, B, C, D, E);
104 T_0_15( 6, E, A, B, C, D);
105 T_0_15( 7, D, E, A, B, C);
106 T_0_15( 8, C, D, E, A, B);
107 T_0_15( 9, B, C, D, E, A);
108 T_0_15(10, A, B, C, D, E);
109 T_0_15(11, E, A, B, C, D);
110 T_0_15(12, D, E, A, B, C);
111 T_0_15(13, C, D, E, A, B);
112 T_0_15(14, B, C, D, E, A);
113 T_0_15(15, A, B, C, D, E);
115 /* Round 1 - tail. Input from 512-bit mixing array */
116 T_16_19(16, E, A, B, C, D);
117 T_16_19(17, D, E, A, B, C);
118 T_16_19(18, C, D, E, A, B);
119 T_16_19(19, B, C, D, E, A);
121 /* Round 2 */
122 T_20_39(20, A, B, C, D, E);
123 T_20_39(21, E, A, B, C, D);
124 T_20_39(22, D, E, A, B, C);
125 T_20_39(23, C, D, E, A, B);
126 T_20_39(24, B, C, D, E, A);
127 T_20_39(25, A, B, C, D, E);
128 T_20_39(26, E, A, B, C, D);
129 T_20_39(27, D, E, A, B, C);
130 T_20_39(28, C, D, E, A, B);
131 T_20_39(29, B, C, D, E, A);
132 T_20_39(30, A, B, C, D, E);
133 T_20_39(31, E, A, B, C, D);
134 T_20_39(32, D, E, A, B, C);
135 T_20_39(33, C, D, E, A, B);
136 T_20_39(34, B, C, D, E, A);
137 T_20_39(35, A, B, C, D, E);
138 T_20_39(36, E, A, B, C, D);
139 T_20_39(37, D, E, A, B, C);
140 T_20_39(38, C, D, E, A, B);
141 T_20_39(39, B, C, D, E, A);
143 /* Round 3 */
144 T_40_59(40, A, B, C, D, E);
145 T_40_59(41, E, A, B, C, D);
146 T_40_59(42, D, E, A, B, C);
147 T_40_59(43, C, D, E, A, B);
148 T_40_59(44, B, C, D, E, A);
149 T_40_59(45, A, B, C, D, E);
150 T_40_59(46, E, A, B, C, D);
151 T_40_59(47, D, E, A, B, C);
152 T_40_59(48, C, D, E, A, B);
153 T_40_59(49, B, C, D, E, A);
154 T_40_59(50, A, B, C, D, E);
155 T_40_59(51, E, A, B, C, D);
156 T_40_59(52, D, E, A, B, C);
157 T_40_59(53, C, D, E, A, B);
158 T_40_59(54, B, C, D, E, A);
159 T_40_59(55, A, B, C, D, E);
160 T_40_59(56, E, A, B, C, D);
161 T_40_59(57, D, E, A, B, C);
162 T_40_59(58, C, D, E, A, B);
163 T_40_59(59, B, C, D, E, A);
165 /* Round 4 */
166 T_60_79(60, A, B, C, D, E);
167 T_60_79(61, E, A, B, C, D);
168 T_60_79(62, D, E, A, B, C);
169 T_60_79(63, C, D, E, A, B);
170 T_60_79(64, B, C, D, E, A);
171 T_60_79(65, A, B, C, D, E);
172 T_60_79(66, E, A, B, C, D);
173 T_60_79(67, D, E, A, B, C);
174 T_60_79(68, C, D, E, A, B);
175 T_60_79(69, B, C, D, E, A);
176 T_60_79(70, A, B, C, D, E);
177 T_60_79(71, E, A, B, C, D);
178 T_60_79(72, D, E, A, B, C);
179 T_60_79(73, C, D, E, A, B);
180 T_60_79(74, B, C, D, E, A);
181 T_60_79(75, A, B, C, D, E);
182 T_60_79(76, E, A, B, C, D);
183 T_60_79(77, D, E, A, B, C);
184 T_60_79(78, C, D, E, A, B);
185 T_60_79(79, B, C, D, E, A);
187 ctx->H[0] += A;
188 ctx->H[1] += B;
189 ctx->H[2] += C;
190 ctx->H[3] += D;
191 ctx->H[4] += E;
194 void blk_SHA1_Init(blk_SHA_CTX *ctx)
196 ctx->size = 0;
198 /* Initialize H with the magic constants (see FIPS180 for constants) */
199 ctx->H[0] = 0x67452301;
200 ctx->H[1] = 0xefcdab89;
201 ctx->H[2] = 0x98badcfe;
202 ctx->H[3] = 0x10325476;
203 ctx->H[4] = 0xc3d2e1f0;
206 void blk_SHA1_Update(blk_SHA_CTX *ctx, const void *data, unsigned long len)
208 unsigned int lenW = ctx->size & 63;
210 ctx->size += len;
212 /* Read the data into W and process blocks as they get full */
213 if (lenW) {
214 unsigned int left = 64 - lenW;
215 if (len < left)
216 left = len;
217 memcpy(lenW + (char *)ctx->W, data, left);
218 lenW = (lenW + left) & 63;
219 len -= left;
220 data = ((const char *)data + left);
221 if (lenW)
222 return;
223 blk_SHA1_Block(ctx, ctx->W);
225 while (len >= 64) {
226 blk_SHA1_Block(ctx, data);
227 data = ((const char *)data + 64);
228 len -= 64;
230 if (len)
231 memcpy(ctx->W, data, len);
234 void blk_SHA1_Final(unsigned char hashout[20], blk_SHA_CTX *ctx)
236 static const unsigned char pad[64] = { 0x80 };
237 unsigned int padlen[2];
238 int i;
240 /* Pad with a binary 1 (ie 0x80), then zeroes, then length */
241 padlen[0] = htonl((uint32_t)(ctx->size >> 29));
242 padlen[1] = htonl((uint32_t)(ctx->size << 3));
244 i = ctx->size & 63;
245 blk_SHA1_Update(ctx, pad, 1 + (63 & (55 - i)));
246 blk_SHA1_Update(ctx, padlen, 8);
248 /* Output hash */
249 for (i = 0; i < 5; i++)
250 put_be32(hashout + i * 4, ctx->H[i]);