1 # release: pcb-rnd 1.0.7
3 # To read pcb files, the pcb version (or the git source date) must be >= the file version
9 Cursor[37500 10000 0.000000]
12 DRC[1200 900 1000 700 1500 1000]
13 Flags("nameonpcb,clearnew,snappin")
14 Groups("1,3,4,c:2,5,6,s:7:8")
15 Styles["Signal,1000,7874,3150,2000:Power,2000,8661,3937,2000:Fat,8000,13780,4724,2500:Sig-tight,1000,6400,3150,1200"]
17 Via[60000 32500 7874 4000 0 3150 "" ""]
18 Via[92500 32500 7874 4000 0 3150 "" ""]
19 Via[75000 32500 7874 4000 0 3150 "" ""]
21 Element["" "Standard SMT resistor, capacitor etc" "R101" "1206" 17500 32500 -5650 4350 0 100 ""]
23 Pad[5905 -1181 5905 1181 5118 2000 5718 "1" "1" "square"]
24 Pad[-5905 -1181 -5905 1181 5118 2000 5718 "2" "2" "square"]
25 ElementLine [-2362 3740 2362 3740 800]
26 ElementLine [-2362 -3740 2362 -3740 800]
30 Element["" "Standard SMT resistor, capacitor etc" "R102" "1206" 117500 32500 -5650 4350 0 100 ""]
32 Pad[5905 -1181 5905 1181 5118 2000 5718 "1" "1" "square"]
33 Pad[-5905 -1181 -5905 1181 5118 2000 5718 "2" "2" "square"]
34 ElementLine [-2362 3740 2362 3740 800]
35 ElementLine [-2362 -3740 2362 -3740 800]
40 Line[23405 32500 60000 32500 1000 4000 "clearline"]
41 Line[92500 32500 111595 32500 1000 4000 "clearline"]
42 Line[60000 32500 60000 32500 1000 4000 "clearline"]
43 Line[60000 32500 75000 32500 1000 4000 "clearline"]
47 Line[75000 32500 92500 32500 1000 4000 "clearline"]
75 Net("GND" "(unknown)")