tools/tgo2pcb.tcl

   1 #! /usr/bin/tclsh
   2 #
   3 # tango to PCB netlist converter
   4 # usage: tgo2pcb input > output
   5 #
   6 # Copyright 1998, Ingo Cyliax, Derivation Systems, Inc.
   7 # Email: cyliax@derivation.com
   8 #
   9
  10 set nets() ""
  11
  12 #
  13 # read a tango netlist and extract the essentials we need, this
  14 # has been tested with OrCad's tango netlister
  15 #
  16 proc rdtgo { file } {
  17         set fd [open $file r]
  18         set line ""
  19         set args ""
  20         set ln 0
  21         set lch ""
  22         set net ""
  23         set pin ""
  24         set ref ""
  25         global nets cnvt
  26         while { 1 } {
  27                 set n [gets $fd line]
  28                 if { $n == -1 } { break }
  29                 incr ln 1
  30
  31                 set ch [string index $line 0]
  32
  33                 if { $ch == "\["} {
  34                         set lch $ch
  35                         set ln 0
  36                 }
  37                 if { $ch == "]"} {
  38                         set lch $ch
  39                         set ln 0
  40                 }
  41                 if { $ch == "("} {
  42                         set lch $ch
  43                         set ln 0
  44                 }
  45                 if { $ch == ")"} {
  46                         set lch $ch
  47                         set ln 0
  48                 }
  49                 if { $ch != "(" && $lch == "(" && $ln == "1"} {
  50                         set net $line
  51                 }
  52                 if { $ch != "(" && $lch == "(" && $ln != "1"} {
  53                         set xx [split $line ,]
  54                         set pin [lindex $xx 1]
  55                         set ref [lindex $xx 0]
  56                         if { $cnvt($pin) != "" } {
  57                                 set pin $cnvt($pin)
  58                         }
  59                         lappend nets($net) "$ref-$pin"
  60                 }
  61         }
  62         close $fd
  63 }
  64
  65 #
  66 # write out a PCB netlist
  67 #
  68 proc wrpcb { } {
  69         global nets
  70         foreach i [array names nets] {
  71                 if { $nets($i) != "" } {
  72                         puts "$i $nets($i)"
  73                 }
  74         }
  75 }
  76
  77 #
  78 # pins 1-99 convert to 1-99, all input pins are converted in this array
  79 #
  80 set pin 1
  81 for { set i 1 } { $i <= 99 } { incr i } {
  82         set cnvt($i) $pin
  83         incr pin
  84 }
  85
  86 #
  87 # read the input file and convert to internal netlist
  88 #
  89 rdtgo [lindex $argv 0]
  90
  91 #
  92 # convert and write to output
  93 #
  94 wrpcb
  95
  96 exit